diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2005-02-01 20:18:59 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:30:20 +0100 |
| commit | aa0980b8090878bf42bc73a13d051a203a201d7d (patch) | |
| tree | c4e411d4100a6006b0bc2945742b0ab2fa10b2e5 /arch/mips/mips-boards/generic/init.c | |
| parent | bec0204dfb35cd5b91c0b34f97a481f363f6b272 (diff) | |
Fixes for system controllers for Atlas/Malta core cards.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/generic/init.c')
| -rw-r--r-- | arch/mips/mips-boards/generic/init.c | 61 |
1 files changed, 40 insertions, 21 deletions
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c index 311155d1d3ed..d821b13d24a0 100644 --- a/arch/mips/mips-boards/generic/init.c +++ b/arch/mips/mips-boards/generic/init.c @@ -1,6 +1,8 @@ /* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. + * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. + * All rights reserved. + * Authors: Carsten Langgaard <carstenl@mips.com> + * Maciej W. Rozycki <macro@mips.com> * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as @@ -22,18 +24,17 @@ #include <linux/string.h> #include <linux/kernel.h> -#include <asm/io.h> #include <asm/bootinfo.h> +#include <asm/gt64120.h> +#include <asm/io.h> +#include <asm/system.h> + #include <asm/mips-boards/prom.h> #include <asm/mips-boards/generic.h> -#ifdef CONFIG_MIPS_GT64120 -#include <asm/gt64120.h> -#endif -#include <asm/mips-boards/msc01_pci.h> #include <asm/mips-boards/bonito64.h> -#ifdef CONFIG_MIPS_MALTA +#include <asm/mips-boards/msc01_pci.h> + #include <asm/mips-boards/malta.h> -#endif #ifdef CONFIG_KGDB extern int rs_kgdb_hook(int, int); @@ -225,6 +226,8 @@ void __init kgdb_config (void) void __init prom_init(void) { + u32 start, map, mask, data; + prom_argc = fw_arg0; _prom_argv = (int *) fw_arg1; _prom_envp = (int *) fw_arg2; @@ -266,12 +269,15 @@ void __init prom_init(void) #else GT_WRITE(GT_PCI0_CMD_OFS, 0); #endif + /* Fix up PCI I/O mapping if necessary (for Atlas). */ + start = GT_READ(GT_PCI0IOLD_OFS); + map = GT_READ(GT_PCI0IOREMAP_OFS); + if ((start & map) != 0) { + map &= ~start; + GT_WRITE(GT_PCI0IOREMAP_OFS, map); + } -#ifdef CONFIG_MIPS_MALTA set_io_port_base(MALTA_GT_PORT_BASE); -#else - set_io_port_base((unsigned long)ioremap(0, 0x20000000)); -#endif break; case MIPS_REVISION_CORID_CORE_EMUL_BON: @@ -300,11 +306,7 @@ void __init prom_init(void) BONITO_BONGENCFG_BYTESWAP; #endif -#ifdef CONFIG_MIPS_MALTA set_io_port_base(MALTA_BONITO_PORT_BASE); -#else - set_io_port_base((unsigned long)ioremap(0, 0x20000000)); -#endif break; case MIPS_REVISION_CORID_CORE_MSC: @@ -312,6 +314,12 @@ void __init prom_init(void) case MIPS_REVISION_CORID_CORE_EMUL_MSC: _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); + mb(); + MSC_READ(MSC01_PCI_CFG, data); + MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT); + wmb(); + + /* Fix up lane swapping. */ #ifdef CONFIG_CPU_LITTLE_ENDIAN MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP); #else @@ -320,12 +328,23 @@ void __init prom_init(void) MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF | MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF); #endif + /* Fix up target memory mapping. */ + MSC_READ(MSC01_PCI_BAR0, mask); + MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK); + + /* Don't handle target retries indefinitely. */ + if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) == + MSC01_PCI_CFG_MAXRTRY_MSK) + data = (data & ~(MSC01_PCI_CFG_MAXRTRY_MSK << + MSC01_PCI_CFG_MAXRTRY_SHF)) | + ((MSC01_PCI_CFG_MAXRTRY_MSK - 1) << + MSC01_PCI_CFG_MAXRTRY_SHF); + + wmb(); + MSC_WRITE(MSC01_PCI_CFG, data); + mb(); -#ifdef CONFIG_MIPS_MALTA set_io_port_base(MALTA_MSC_PORT_BASE); -#else - set_io_port_base((unsigned long)ioremap(0, 0x20000000)); -#endif break; default: |