summaryrefslogtreecommitdiff
path: root/arch/mips/mm/tlbex.c
diff options
context:
space:
mode:
authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>2014-03-04 13:34:43 +0000
committerRalf Baechle <ralf@linux-mips.org>2014-03-26 23:09:22 +0100
commitf36c4720fca325579faddc880d4e178e4ccbda88 (patch)
tree201608d0ba6b8b705ea20f9c64fc02364b402cdf /arch/mips/mm/tlbex.c
parent4975b86add254e1c706c82cded06ca2911f90ae3 (diff)
MIPS: Add support for the M5150 processor
The M5150 core is a 32-bit MIPS RISC which implements the MIPS Architecture Release-5 in a 5-stage pipeline. In addition, it includes the MIPS Architecture Virtualization Module that enables virtualization of operating systems, which provides a scalable, trusted, and secure execution environment. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6596/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/tlbex.c')
-rw-r--r--arch/mips/mm/tlbex.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index ccae9a46e222..be407d5ccc4e 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -512,6 +512,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
case CPU_1074K:
case CPU_PROAPTIV:
case CPU_P5600:
+ case CPU_M5150:
break;
default: