summaryrefslogtreecommitdiff
path: root/arch/mips/mm/uasm-micromips.c
diff options
context:
space:
mode:
authorPaul Burton <paul.burton@imgtec.com>2013-12-24 03:49:45 +0000
committerPaul Burton <paul.burton@imgtec.com>2014-05-28 16:20:26 +0100
commit729ff56169395cb3e467e4e3c1e2637f4d3436ce (patch)
treebdb21de660a5fb826f2c308e8aa3e1315d48837e /arch/mips/mm/uasm-micromips.c
parent49e9529b9d43773307b8c73bd251b71784830c3d (diff)
MIPS: uasm: add sync instruction
This patch allows use of the sync instruction from uasm. It will be used by a subsequent patch. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/mm/uasm-micromips.c')
-rw-r--r--arch/mips/mm/uasm-micromips.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index b8d580ca02e5..9500f2a951f9 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -99,6 +99,7 @@ static struct insn insn_table_MM[] = {
{ insn_rotr, M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD },
{ insn_subu, M(mm_pool32a_op, 0, 0, 0, 0, mm_subu32_op), RT | RS | RD },
{ insn_sw, M(mm_sw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
+ { insn_sync, M(mm_pool32a_op, 0, 0, 0, mm_sync_op, mm_pool32axf_op), RS },
{ insn_tlbp, M(mm_pool32a_op, 0, 0, 0, mm_tlbp_op, mm_pool32axf_op), 0 },
{ insn_tlbr, M(mm_pool32a_op, 0, 0, 0, mm_tlbr_op, mm_pool32axf_op), 0 },
{ insn_tlbwi, M(mm_pool32a_op, 0, 0, 0, mm_tlbwi_op, mm_pool32axf_op), 0 },