Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (47 commits)
  [MAINTAINERS] The ham radio code now has website at http://www.linux-ax25.org.
  [MIPS] Use __ffs() instead of ffs() for waybit calculation.
  [MIPS] Fix Makefile bugs for MIPS32/MIPS64 R1 and R2.
  [MIPS] Handle IDE PIO cache aliases on SMP.
  [MIPS] Make mips_srs_init static.
  [MIPS] MIPS boards: Set HZ to 100.
  [MIPS] kgdb: Let gcc compute the array size itself.
  [MIPS] FPU affinity for MT ASE.
  [MIPS] MT: Improved multithreading support.
  [MIPS] kpsd and other AP/SP improvements.
  [MIPS] R2: Instruction hazard barrier.
  [MIPS] Fix genrtc compilation.
  [MIPS] R2: Implement shadow register allocation without spinlock.
  [MIPS] Fix VR41xx build errors.
  [MIPS] Fix tx49_blast_icache32_page_indexed.
  [MIPS] Enable SCHED_NO_NO_OMIT_FRAME_POINTER for MIPS.
  [MIPS] Use "R" constraint for cache_op.
  [MIPS] Rewrite all the assembler interrupt handlers to C.
  [MIPS] Fix the crime against humanity that mipsIRQ.S is.
  [MIPS] Fixup damage done by 22a9835c350782a5c3257343713932af3ac92ee0.
  ...

1 files changed, 16 insertions, 7 deletions

diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
index c500e2d41f2c..39ee6314f627 100644
--- a/arch/mips/philips/pnx8550/common/int.c
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -38,8 +38,6 @@
 #include <int.h>
 #include <uart.h>
 
-extern asmlinkage void cp0_irqdispatch(void);
-
 static DEFINE_SPINLOCK(irq_lock);
 
 /* default prio for interrupts */
@@ -55,7 +53,7 @@ static char gic_prio[PNX8550_INT_GIC_TOTINT] = {
 	1			//  70
 };
 
-void hw0_irqdispatch(int irq, struct pt_regs *regs)
+static void hw0_irqdispatch(int irq, struct pt_regs *regs)
 {
 	/* find out which interrupt */
 	irq = PNX8550_GIC_VECTOR_0 >> 3;
@@ -68,7 +66,7 @@ void hw0_irqdispatch(int irq, struct pt_regs *regs)
 }
 
 
-void timer_irqdispatch(int irq, struct pt_regs *regs)
+static void timer_irqdispatch(int irq, struct pt_regs *regs)
 {
 	irq = (0x01c0 & read_c0_config7()) >> 6;
 
@@ -88,6 +86,20 @@ void timer_irqdispatch(int irq, struct pt_regs *regs)
 	}
 }
 
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+	unsigned int pending = read_c0_status() & read_c0_cause();
+
+	if (pending & STATUSF_IP2)
+		do_IRQ(2, regs);
+	else if (pending & STATUSF_IP7) {
+		if (read_c0_config7() & 0x01c0)
+			timer_irqdispatch(7, regs);
+	}
+
+	spurious_interrupt(regs);
+}
+
 static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
 {
 	unsigned long status = read_c0_status();
@@ -223,9 +235,6 @@ void __init arch_init_irq(void)
 	int i;
 	int configPR;
 
-	/* init of cp0 interrupts */
-	set_except_vector(0, cp0_irqdispatch);
-
 	for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
 		irq_desc[i].handler = &level_irq_type;
 		pnx8550_ack(i);	/* mask the irq just in case  */