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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 15:07:19 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 15:07:19 -0700
commitb4beb4bf9934d151bf4581a54ae028927374cb2a (patch)
tree28475f62b18784e1d10b05e901799d02c054587f /arch/mips
parentf3c3f0670501fee130f22193369249deea8cc630 (diff)
parent3945fe9314af718946f71185901c28dd349469c7 (diff)
Merge branch 'for-linus/i2c-3.2' of git://git.fluff.org/bjdooks/linux
* 'for-linus/i2c-3.2' of git://git.fluff.org/bjdooks/linux: (47 commits) i2c-s3c2410: Add device tree support i2c-s3c2410: Keep a copy of platform data and use it i2c-nomadik: cosmetic coding style corrections i2c-au1550: dev_pm_ops conversion i2c-au1550: increase timeout waiting for master done i2c-au1550: remove unused ack_timeout i2c-au1550: remove usage of volatile keyword i2c-tegra: __iomem annotation fix i2c-eg20t: Add initialize processing in case i2c-error occurs i2c-eg20t: Fix flag setting issue i2c-eg20t: add stop sequence in case wait-event timeout occurs i2c-eg20t: Separate error processing i2c-eg20t: Fix 10bit access issue i2c-eg20t: Modify returned value s32 to long i2c-eg20t: Fix bus-idle waiting issue i2c-designware: Fix PCI core warning on suspend/resume i2c-designware: Add runtime power management support i2c-designware: Add support for Designware core behind PCI devices. i2c-designware: Push all register reads/writes into the core code. i2c-designware: Support multiple cores using same ISR ...
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1xxx_psc.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
index 892b7f168eb4..5a5cb7386427 100644
--- a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
+++ b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
@@ -394,19 +394,6 @@ typedef struct psc_spi {
#define PSC_SPITXRX_LC (1 << 29)
#define PSC_SPITXRX_SR (1 << 28)
-/* PSC in SMBus (I2C) Mode. */
-typedef struct psc_smb {
- u32 psc_sel;
- u32 psc_ctrl;
- u32 psc_smbcfg;
- u32 psc_smbmsk;
- u32 psc_smbpcr;
- u32 psc_smbstat;
- u32 psc_smbevnt;
- u32 psc_smbtxrx;
- u32 psc_smbtmr;
-} psc_smb_t;
-
/* SMBus Config Register. */
#define PSC_SMBCFG_RT_MASK (3 << 30)
#define PSC_SMBCFG_RT_FIFO1 (0 << 30)