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authorJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-08-20 07:28:30 -0500
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-08-20 07:28:30 -0500
commite90f3b74d884d0f2826e06dbab4f615ca346eaa4 (patch)
tree19b10d012a78ec644c7ce65be5df1c9d80f96ddc /arch/powerpc/boot/4xx.c
parent869680c16fb028ac4ad9a449283e0514789c654a (diff)
[POWERPC] 4xx bootwrapper reworks
Make the fixup_memsize function common for all of 4xx as several chips share the same SDRAM controller. Also add functions to reset 40x chips and quiesce the ethernet. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/4xx.c')
-rw-r--r--arch/powerpc/boot/4xx.c35
1 files changed, 30 insertions, 5 deletions
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
index 9f64e840bef6..59026e4585dc 100644
--- a/arch/powerpc/boot/4xx.c
+++ b/arch/powerpc/boot/4xx.c
@@ -21,8 +21,8 @@
#include "reg.h"
#include "dcr.h"
-/* Read the 44x memory controller to get size of system memory. */
-void ibm44x_fixup_memsize(void)
+/* Read the 4xx SDRAM controller to get size of system memory. */
+void ibm4xx_fixup_memsize(void)
{
int i;
unsigned long memsize, bank_config;
@@ -39,8 +39,9 @@ void ibm44x_fixup_memsize(void)
dt_fixup_memory(0, memsize);
}
-#define SPRN_DBCR0 0x134
-#define DBCR0_RST_SYSTEM 0x30000000
+#define SPRN_DBCR0_40X 0x3F2
+#define SPRN_DBCR0_44X 0x134
+#define DBCR0_RST_SYSTEM 0x30000000
void ibm44x_dbcr_reset(void)
{
@@ -50,11 +51,35 @@ void ibm44x_dbcr_reset(void)
"mfspr %0,%1\n"
"oris %0,%0,%2@h\n"
"mtspr %1,%0"
- : "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
+ : "=&r"(tmp) : "i"(SPRN_DBCR0_44X), "i"(DBCR0_RST_SYSTEM)
);
}
+void ibm40x_dbcr_reset(void)
+{
+ unsigned long tmp;
+
+ asm volatile (
+ "mfspr %0,%1\n"
+ "oris %0,%0,%2@h\n"
+ "mtspr %1,%0"
+ : "=&r"(tmp) : "i"(SPRN_DBCR0_40X), "i"(DBCR0_RST_SYSTEM)
+ );
+}
+
+#define EMAC_RESET 0x20000000
+void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
+{
+ /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */
+ if (emac0)
+ *emac0 = EMAC_RESET;
+ if (emac1)
+ *emac1 = EMAC_RESET;
+
+ mtdcr(DCRN_MAL0_CFG, MAL_RESET);
+}
+
/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
* banks into the OPB address space */
void ibm4xx_fixup_ebc_ranges(const char *ebc)