diff options
author | David Erb <djerb@us.ibm.com> | 2006-10-24 18:31:20 +0200 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-10-25 14:20:21 +1000 |
commit | 22b8c9f5baeb440a716ea760ff05290221565b4c (patch) | |
tree | 11d5d0c6218da965fbe2921df6f411a0417e90da /arch/powerpc/platforms/cell/pervasive.c | |
parent | 099814bb1f9bd9081d7c85867f8eb8c049abc1b9 (diff) |
[POWERPC] cell: update Cell BE register definitions
There are a few definitions that are required by subsequent patches,
so add them here.
The original patch is from David Erb, but is significantly cleaned
up by Kevon Corry.
Cc: Kevin Corry <kevcorry@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/cell/pervasive.c')
-rw-r--r-- | arch/powerpc/platforms/cell/pervasive.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c index 9f2e4ed20a57..fdcd89e99f1b 100644 --- a/arch/powerpc/platforms/cell/pervasive.c +++ b/arch/powerpc/platforms/cell/pervasive.c @@ -54,9 +54,9 @@ static void __init cbe_enable_pause_zero(void) pr_debug("Power Management: CPU %d\n", smp_processor_id()); /* Enable Pause(0) control bit */ - temp_register = in_be64(&pregs->pm_control); + temp_register = in_be64(&pregs->pmcr); - out_be64(&pregs->pm_control, + out_be64(&pregs->pmcr, temp_register | CBE_PMD_PAUSE_ZERO_CONTROL); /* Enable DEC and EE interrupt request */ @@ -87,7 +87,7 @@ static void cbe_idle(void) unsigned long ctrl; /* Why do we do that on every idle ? Couldn't that be done once for - * all or do we lose the state some way ? Also, the pm_control + * all or do we lose the state some way ? Also, the pmcr * register setting, that can't be set once at boot ? We really want * to move that away in order to implement a simple powersave */ |