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authorSebastian Ott <sebott@linux.ibm.com>2019-05-16 13:28:17 +0200
committerHeiko Carstens <heiko.carstens@de.ibm.com>2019-05-28 14:49:29 +0200
commit1354b38b3ddf47e0612d21f401d2bfeb8acd9b80 (patch)
tree81b943a8797bf6672eab15a18b702a4c4aa9c997 /arch/s390/pci
parentd83623c5eab25f5a83e308f24b1e6a4cb8628eb5 (diff)
s390/pci: fix struct definition for set PCI function
Recent firmware will store PCI MIO information also when enabling MIO instructions via set PCI function. We do not use this information but currently calling enable MIO will fail because of insufficient response block length. Fix this by putting a struct mio_info at the end of the affected response block struct. Fixes: 71ba41c9b1d9 ("s390/pci: provide support for MIO instructions") Signed-off-by: Sebastian Ott <sebott@linux.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Diffstat (limited to 'arch/s390/pci')
-rw-r--r--arch/s390/pci/pci_clp.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/s390/pci/pci_clp.c b/arch/s390/pci/pci_clp.c
index 3a36b07a5571..d03631dba7c2 100644
--- a/arch/s390/pci/pci_clp.c
+++ b/arch/s390/pci/pci_clp.c
@@ -165,11 +165,11 @@ static int clp_store_query_pci_fn(struct zpci_dev *zdev,
}
zdev->mio_capable = response->mio_addr_avail;
for (i = 0; i < PCI_BAR_COUNT; i++) {
- if (!(response->mio_valid & (1 << (PCI_BAR_COUNT - i - 1))))
+ if (!(response->mio.valid & (1 << (PCI_BAR_COUNT - i - 1))))
continue;
- zdev->bars[i].mio_wb = (void __iomem *) response->addr[i].wb;
- zdev->bars[i].mio_wt = (void __iomem *) response->addr[i].wt;
+ zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
+ zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
}
return 0;
}