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authorPaul Mundt <lethal@linux-sh.org>2009-04-17 15:08:01 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-04-17 15:08:01 +0900
commitab78cbcf6877334fc20868b7df7887349e2e01c8 (patch)
tree227497c6325f89b81e9a2b982f0af7e1c660b2f7 /arch/sh/drivers
parent4e7b7fdb129995640f144b7de114e109c6b46a2a (diff)
sh: pci: Use the proper write size for class/sub-class code.
Don't use pci_write_reg() for these, as it defaults to 32-bit. Rather than using the helper, use __raw_writeb() directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers')
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 63b5151e9aaa..19bac2168f4f 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -78,8 +78,10 @@ int __init sh7780_pcic_init(struct pci_channel *chan,
{
u32 word;
- pci_write_reg(chan, PCI_CLASS_BRIDGE_HOST >> 8, SH7780_PCIBCC);
- pci_write_reg(chan, PCI_CLASS_BRIDGE_HOST & 0xff, SH7780_PCISUB);
+ __raw_writeb(PCI_CLASS_BRIDGE_HOST >> 8,
+ chan->reg_base + SH7780_PCIBCC);
+ __raw_writeb(PCI_CLASS_BRIDGE_HOST & 0xff,
+ chan->reg_base + SH7780_PCISUB);
/* set the command/status bits to:
* Wait Cycle Control + Parity Enable + Bus Master +