diff options
author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2018-05-16 23:18:09 -0400 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-05-22 18:54:07 +0200 |
commit | 92a3c944d6d5d3e08335cd3b6a75df907a43a960 (patch) | |
tree | 30d4086d531d40a1a1c5f685b925e2952a95d63d /arch/x86/include/asm/msr-index.h | |
parent | e8837f0a000f79e1e629ad8a00eceb3c452bf3bc (diff) |
x86/bugs: Rename SSBD_NO to SSB_NO
commit 240da953fcc6a9008c92fae5b1f727ee5ed167ab upstream
The "336996 Speculative Execution Side Channel Mitigations" from
May defines this as SSB_NO, hence lets sync-up.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 44af6ce41e9d..504b21692d32 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -70,7 +70,7 @@ #define MSR_IA32_ARCH_CAPABILITIES 0x0000010a #define ARCH_CAP_RDCL_NO (1 << 0) /* Not susceptible to Meltdown */ #define ARCH_CAP_IBRS_ALL (1 << 1) /* Enhanced IBRS support */ -#define ARCH_CAP_SSBD_NO (1 << 4) /* +#define ARCH_CAP_SSB_NO (1 << 4) /* * Not susceptible to Speculative Store Bypass * attack, so no Speculative Store Bypass * control required. |