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authorJoerg Roedel <jroedel@suse.de>2021-12-02 16:32:25 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-01-27 09:19:42 +0100
commitff867910e87c2c1613f2a879b47c71c9a447621e (patch)
treec37349ff6047be5881d92a854f669e3b0652d8ae /arch/x86/include/asm/realmode.h
parent16f2ef98cccfd2b26456581ae02ea875bc789e62 (diff)
x86/mm: Flush global TLB when switching to trampoline page-table
[ Upstream commit 71d5049b053876afbde6c3273250b76935494ab2 ] Move the switching code into a function so that it can be re-used and add a global TLB flush. This makes sure that usage of memory which is not mapped in the trampoline page-table is reliably caught. Also move the clearing of CR4.PCIDE before the CR3 switch because the cr4_clear_bits() function will access data not mapped into the trampoline page-table. Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211202153226.22946-4-joro@8bytes.org Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/realmode.h')
-rw-r--r--arch/x86/include/asm/realmode.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h
index 09ecc32f6524..52d7512ea91a 100644
--- a/arch/x86/include/asm/realmode.h
+++ b/arch/x86/include/asm/realmode.h
@@ -82,6 +82,7 @@ static inline void set_real_mode_mem(phys_addr_t mem)
}
void reserve_real_mode(void);
+void load_trampoline_pgtable(void);
#endif /* __ASSEMBLY__ */