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authorRobin Gong <B38343@freescale.com>2012-08-23 11:45:22 +0800
committerRobin Gong <B38343@freescale.com>2012-08-23 14:02:03 +0800
commita6d5151631e09a98484a01d74feba4ad642c2b1c (patch)
treeaf56d96b943313d3d7d43a64b290791ca98fb715 /arch
parentc292d1d4b87dd8865e8983b35975fd6223fb7cc6 (diff)
ENGR00221102-2 MX6Q: increase VPU frequence to 352Mhz
Increase VPU frequency to 352Mhz for TV box, use pll2_pfd_400M.To avoid impact other code which assume ARM clock sourcing from pll2_pfd_400M, change cpu setpoint of 396M to 352M. and disable bus freq adjust. add CONFIG_MX6_VPU_352M to choose it, default is disabled. Signed-off-by: Robin Gong <B38343@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx6/bus_freq.c15
-rw-r--r--arch/arm/mach-mx6/clock.c6
-rw-r--r--arch/arm/mach-mx6/cpu_op-mx6.c57
3 files changed, 77 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/bus_freq.c b/arch/arm/mach-mx6/bus_freq.c
index fa11d89e1191..1204da8368cc 100644
--- a/arch/arm/mach-mx6/bus_freq.c
+++ b/arch/arm/mach-mx6/bus_freq.c
@@ -416,7 +416,15 @@ static ssize_t bus_freq_scaling_enable_store(struct device *dev,
const char *buf, size_t size)
{
if (strncmp(buf, "1", 1) == 0) {
+#ifdef CONFIG_MX6_VPU_352M
+ if (cpu_is_mx6q())
+ /*do not enable bus freq*/
+ bus_freq_scaling_is_active = 0;
+ printk(KERN_WARNING "Bus frequency can't be enabled if using VPU 352M!\n");
+ return size;
+#else
bus_freq_scaling_is_active = 1;
+#endif
set_high_bus_freq(0);
/* Make sure system can enter low bus mode if it should be in
low bus mode */
@@ -669,9 +677,14 @@ static int __init busfreq_init(void)
printk(KERN_INFO "Bus freq driver module loaded\n");
+#ifdef CONFIG_MX6_VPU_352M
+ if (cpu_is_mx6q())
+ bus_freq_scaling_is_active = 0;/*disable bus_freq*/
+
+#else
/* Enable busfreq by default. */
bus_freq_scaling_is_active = 1;
-
+#endif
if (cpu_is_mx6q())
set_high_bus_freq(1);
else if (cpu_is_mx6dl())
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c
index 08e80dc88a2c..39e39bfe48d4 100644
--- a/arch/arm/mach-mx6/clock.c
+++ b/arch/arm/mach-mx6/clock.c
@@ -5339,6 +5339,12 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc,
clk_tree_init();
+#ifdef CONFIG_MX6_VPU_352M
+ if (cpu_is_mx6q()) {
+ clk_set_rate(&pll2_pfd_400M, 352000000);
+ clk_set_parent(&vpu_clk[0], &pll2_pfd_400M);
+ }
+#endif
/* keep correct count. */
clk_enable(&cpu_clk);
clk_enable(&periph_clk);
diff --git a/arch/arm/mach-mx6/cpu_op-mx6.c b/arch/arm/mach-mx6/cpu_op-mx6.c
index d0a7a42dfb85..db0bacbfa476 100644
--- a/arch/arm/mach-mx6/cpu_op-mx6.c
+++ b/arch/arm/mach-mx6/cpu_op-mx6.c
@@ -36,9 +36,27 @@ static struct cpu_op mx6_cpu_op_1_2G[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
+#ifdef CONFIG_MX6_VPU_352M
+ /*VPU 352Mhz need voltage 1.25V*/
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+#else
.pu_voltage = 1150000,
.soc_voltage = 1150000,
+#endif
.cpu_voltage = 1100000,},
+#ifdef CONFIG_MX6_VPU_352M
+ /*pll2_pfd_400M will be fix on 352M,to avoid modify other code
+ which assume ARM clock sourcing from pll2_pfd_400M, change cpu
+ freq from 396M to 352M.*/
+ {
+ .pll_rate = 352000000,
+ .cpu_rate = 352000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+ .cpu_voltage = 925000,},
+#else
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
@@ -46,6 +64,7 @@ static struct cpu_op mx6_cpu_op_1_2G[] = {
.pu_voltage = 1150000,
.soc_voltage = 1150000,
.cpu_voltage = 925000,},
+#endif
};
/* working point(wp): 0 - 1GHz; 1 - 792MHz, 2 - 498MHz 3 - 396MHz */
@@ -61,9 +80,27 @@ static struct cpu_op mx6_cpu_op_1G[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
+#ifdef CONFIG_MX6_VPU_352M
+ /*VPU 352Mhz need voltage 1.25V*/
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+#else
.pu_voltage = 1150000,
.soc_voltage = 1150000,
+#endif
.cpu_voltage = 1100000,},
+#ifdef CONFIG_MX6_VPU_352M
+ /*pll2_pfd_400M will be fix on 352M,to avoid modify other code
+ which assume ARM clock sourcing from pll2_pfd_400M, change cpu
+ freq from 396M to 352M.*/
+ {
+ .pll_rate = 352000000,
+ .cpu_rate = 352000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+ .cpu_voltage = 925000,},
+#else
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
@@ -71,6 +108,7 @@ static struct cpu_op mx6_cpu_op_1G[] = {
.pu_voltage = 1150000,
.soc_voltage = 1150000,
.cpu_voltage = 925000,},
+#endif
};
static struct cpu_op mx6_cpu_op[] = {
@@ -78,9 +116,27 @@ static struct cpu_op mx6_cpu_op[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
+#ifdef CONFIG_MX6_VPU_352M
+ /*VPU 352Mhz need voltage 1.25V*/
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+#else
.pu_voltage = 1150000,
.soc_voltage = 1150000,
+#endif
.cpu_voltage = 1100000,},
+#ifdef CONFIG_MX6_VPU_352M
+ /*pll2_pfd_400M will be fix on 352M,to avoid modify other code
+ which assume ARM clock sourcing from pll2_pfd_400M, change cpu
+ freq from 396M to 352M.*/
+ {
+ .pll_rate = 352000000,
+ .cpu_rate = 352000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+ .cpu_voltage = 925000,},
+#else
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
@@ -88,6 +144,7 @@ static struct cpu_op mx6_cpu_op[] = {
.pu_voltage = 1150000,
.soc_voltage = 1150000,
.cpu_voltage = 925000,},
+#endif
};
/* working point(wp): 0 - 1.2GHz; 1 - 800MHz, 2 - 400MHz, 3 - 200MHz */