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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2015-01-16 03:15:03 +0100
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2015-01-16 10:42:08 +0100
commit4e87f2dd9bc258c85b2f3bb1a100b49927fbe6f3 (patch)
tree96c82edf20e2c28e8fc4d97438d00e3b18b8afe9 /arch
parentfe4c58c4b96a24aba8e27956e8158b3002723b17 (diff)
parentc7460e0d6afd754ebf5555477129579bc83c47b9 (diff)
Merge remote-tracking branch 'remotes/nvidia/l4t/l4t-r16-r2' into tegra-next
(tegra-l4t-r16-16.5) Conflicts: drivers/media/video/tegra_v4l2_camera.c drivers/mmc/host/sdhci.c drivers/watchdog/tegra_wdt.c include/media/tegra_v4l2_camera.h
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/board-cardhu-sensors.c13
-rw-r--r--arch/arm/mach-tegra/pwm.c4
-rw-r--r--arch/arm/mach-tegra/tegra3_clocks.c2
3 files changed, 12 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-sensors.c b/arch/arm/mach-tegra/board-cardhu-sensors.c
index af66e1f571c6..3c259ebcdba1 100644
--- a/arch/arm/mach-tegra/board-cardhu-sensors.c
+++ b/arch/arm/mach-tegra/board-cardhu-sensors.c
@@ -115,6 +115,8 @@ static struct tegra_camera_platform_data cardhu_ov5640_camera_platform_data = {
.port = TEGRA_CAMERA_PORT_CSI_B,
.lanes = 2,
.continuous_clk = 0,
+ .continuous_capture = 1,
+ .vi_freq = 24000000,
};
static struct soc_camera_link ov5640_iclink = {
@@ -667,7 +669,7 @@ static const struct i2c_board_info cardhu_i2c3_board_info[] = {
},
};
-
+#if !defined(CONFIG_SOC_CAMERA)
static struct nvc_gpio_pdata sh532u_gpio_pdata[] = {
{ SH532U_GPIO_RESET, TEGRA_GPIO_PBB0, false, 0, },
};
@@ -862,6 +864,7 @@ static struct i2c_board_info cardhu_i2c8_board_info[] = {
},
#endif
};
+#endif
static int nct_get_temp(void *_data, long *temp)
{
@@ -1190,14 +1193,15 @@ int __init cardhu_sensors_init(void)
cardhu_camera_init();
cam_tca6416_init();
+ i2c_register_board_info(2, cardhu_i2c3_board_info,
+ ARRAY_SIZE(cardhu_i2c3_board_info));
+
+#if !defined(CONFIG_SOC_CAMERA)
if (board_info.board_id != BOARD_PM315) {
- i2c_register_board_info(2, cardhu_i2c3_board_info,
- ARRAY_SIZE(cardhu_i2c3_board_info));
i2c_register_board_info(2, cardhu_i2c_board_info_tps61050,
ARRAY_SIZE(cardhu_i2c_board_info_tps61050));
}
-
#ifdef CONFIG_VIDEO_OV14810
/* This is disabled by default; To enable this change Kconfig;
* there should be some way to detect dynamically which board
@@ -1230,6 +1234,7 @@ int __init cardhu_sensors_init(void)
ARRAY_SIZE(cardhu_i2c8_board_info));
#endif
+#endif
pmu_tca6416_init();
if (board_info.board_id == BOARD_E1291)
diff --git a/arch/arm/mach-tegra/pwm.c b/arch/arm/mach-tegra/pwm.c
index d5533c7d3c05..f2c43e994c9f 100644
--- a/arch/arm/mach-tegra/pwm.c
+++ b/arch/arm/mach-tegra/pwm.c
@@ -3,7 +3,7 @@
*
* Tegra pulse-width-modulation controller driver
*
- * Copyright (c) 2010, NVIDIA Corporation.
+ * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
* Based on arch/arm/plat-mxc/pwm.c by Sascha Hauer <s.hauer@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
@@ -131,7 +131,7 @@ void pwm_disable(struct pwm_device *pwm)
clk_disable(pwm->clk);
pwm->clk_enb = 0;
} else
- dev_warn(&pwm->pdev->dev, "%s called on disabled PWM\n",
+ dev_info(&pwm->pdev->dev, "%s called on disabled PWM\n",
__func__);
mutex_unlock(&pwm_lock);
}
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c
index fafa5a22157a..eaacad3d3396 100644
--- a/arch/arm/mach-tegra/tegra3_clocks.c
+++ b/arch/arm/mach-tegra/tegra3_clocks.c
@@ -4372,7 +4372,7 @@ struct clk tegra_list_clks[] = {
PERIPH_CLK("uartc_dbg", "serial8250.0", "uartc", 55, 0x1a0, 900000000, mux_pllp_clkm, MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
PERIPH_CLK("uartd_dbg", "serial8250.0", "uartd", 65, 0x1c0, 900000000, mux_pllp_clkm, MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
PERIPH_CLK("uarte_dbg", "serial8250.0", "uarte", 66, 0x1c4, 900000000, mux_pllp_clkm, MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
- PERIPH_CLK_EX("vi", "tegra_camera", "vi", 20, 0x148, 470000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT, &tegra_vi_clk_ops),
+ PERIPH_CLK_EX("vi", "tegra_camera", "vi", 20, 0x148, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71, &tegra_vi_clk_ops),
PERIPH_CLK("vi_sensor", "tegra_camera", "vi_sensor", 20, 0x1a8, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_NO_RESET),
PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 600000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET),
PERIPH_CLK("3d2", "3d2", NULL, 98, 0x3b0, 600000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET),