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authorStefan Agner <stefan.agner@toradex.com>2018-06-15 19:11:07 +0200
committerMax Krummenacher <max.krummenacher@toradex.com>2018-10-11 19:40:27 +0200
commit1163997ec1b094515bbcb7502890569866c5e7d2 (patch)
tree7dcbbac5b3d0bae58f1a1b15925bf43826127247 /arch
parent0507816aa4b9a4f5764d308b23332fc297e6fe0f (diff)
apalis-imx8qm: remove lpcg_xxx clocks in module level dt
Remove lpcg_xxx clocks (pcie_per) also in module level device tree. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> (cherry picked from commit 4327a27b34c2c83b7998087e7cad928272aa1d4d) (cherry picked from commit b1cecac7dad4d6738ad99d8d6d1c26165c8d992e)
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
index dbe04811b295..75c39e765472 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
@@ -895,10 +895,9 @@
clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>,
<&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>,
<&clk IMX8QM_HSIO_PHY_X2_PCLK_0>,
- <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>,
<&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>,
<&pcie_sata_refclk_gate>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", "pcie_ext";
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext";
reset-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
status = "okay";
@@ -912,10 +911,9 @@
clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>,
<&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>,
<&clk IMX8QM_HSIO_PHY_X2_PCLK_1>,
- <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>,
<&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>,
<&pcie_sata_refclk_gate>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", "pcie_ext";
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext";
reset-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>;
/*clkreq-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;*/