diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2018-01-17 15:57:51 +0100 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2018-10-11 19:40:14 +0200 |
| commit | 4b08986970450ac5d8aa40e3a87b1a090486f6f2 (patch) | |
| tree | 0aedbc9ab50d1639a2148e67af1b18edf862d3bb /arch | |
| parent | 570c8b91882b9485bde8f007b26a11aacde0994c (diff) | |
apalis-imx8qm: take PLX PCIe switch out of reset via GPIO7
The Apalis iMX8 does not make use of the PCIE_CTRL0_PERST_B signal.
However, the Apalis Evaluation Board uses GPIO7 as a PCIe reset
signal for the PLX PCIe switch. With this the Apalis PCIe port
comes up as Gen2 successfully on the Apalis Evaluation board.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit daed8f84e1675e9c091ae240d041c458be6f263f)
(cherry picked from commit b2b9f4eebd50b2419d54109677c164a3eb906357)
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index c3a158a4c30e..f9f2afd55afb 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -327,6 +327,7 @@ SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x00000021 SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x00000021 SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x00000021 + SC_P_MLB_SIG_LSIO_GPIO3_IO26 0x00000021 >; }; @@ -646,7 +647,7 @@ <&pcie_sata_refclk_gate>; clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext"; - reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; + reset-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>; status = "okay"; }; |