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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2014-08-13 12:31:57 +0530
committerJiri Slaby <jslaby@suse.cz>2014-09-17 16:55:04 +0200
commit4cd682a176e4972805bc10ad04a95642daa6d3dd (patch)
tree2fc1d9ba801728107cc98f1a47e190173c2ccf94 /arch
parent6c4e48e6c27362946f36151350f26ca0e6be8437 (diff)
powerpc/thp: Add write barrier after updating the valid bit
commit b0aa44a3dfae3d8f45bd1264349aa87f87b7774f upstream. With hugepages, we store the hpte valid information in the pte page whose address is stored in the second half of the PMD. Use a write barrier to make sure clearing pmd busy bit and updating hpte valid info are ordered properly. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/mm/hugepage-hash64.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc/mm/hugepage-hash64.c b/arch/powerpc/mm/hugepage-hash64.c
index 34de9e0cdc34..f50c4dfd1819 100644
--- a/arch/powerpc/mm/hugepage-hash64.c
+++ b/arch/powerpc/mm/hugepage-hash64.c
@@ -168,8 +168,11 @@ repeat:
mark_hpte_slot_valid(hpte_slot_array, index, slot);
}
/*
- * No need to use ldarx/stdcx here
+ * The hpte valid is stored in the pgtable whose address is in the
+ * second half of the PMD. Order this against clearing of the busy bit in
+ * huge pmd.
*/
+ smp_wmb();
*pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
return 0;
}