diff options
author | guoyin.chen <guoyin.chen@freescale.com> | 2013-07-25 12:51:11 +0800 |
---|---|---|
committer | guoyin.chen <guoyin.chen@freescale.com> | 2013-07-25 12:51:11 +0800 |
commit | e0ed8f9615984df78cd5443727e7657983a6f6b0 (patch) | |
tree | 3df10cef101c1d88213433c46f71014f606e4fdd /arch | |
parent | 8ae3cff80f21bb078fcef63520a98f2d73e7359a (diff) | |
parent | 781e4301e0c4d7a86a198c867164c13ad727837e (diff) |
Merge remote-tracking branch 'fsl-linux-sdk/imx_3.0.35_4.1.0' into imx_3.0.35_android
Diffstat (limited to 'arch')
-rwxr-xr-x | arch/arm/Kconfig | 10 | ||||
-rw-r--r-- | arch/arm/configs/imx6_defconfig | 3 | ||||
-rw-r--r-- | arch/arm/configs/imx6_updater_defconfig | 3 | ||||
-rw-r--r-- | arch/arm/configs/imx6s_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/configs/imx6s_updater_defconfig | 1 | ||||
-rwxr-xr-x | arch/arm/mach-mx6/board-mx6sl_arm2.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx6/board-mx6sl_evk.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mx6/clock.c | 14 | ||||
-rwxr-xr-x | arch/arm/mach-mx6/clock_mx6sl.c | 51 | ||||
-rw-r--r-- | arch/arm/mach-mx6/pm.c | 53 | ||||
-rw-r--r-- | arch/arm/mach-mx6/usb_dr.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-mx6/usb_h1.c | 12 | ||||
-rw-r--r-- | arch/arm/mm/cache-v7.S | 3 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/epdc.h | 3 |
14 files changed, 102 insertions, 64 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 25fa0ede0d1b..553f545ece19 100755 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1247,6 +1247,16 @@ config ARM_ERRATA_754327 This workaround defines cpu_relax() as smp_mb(), preventing correctly written polling loops from denying visibility of updates to memory. +config ARM_ERRATA_775420 + bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock" + depends on CPU_V7 + help + This option enables the workaround for the 775420 Cortex-A9 (r2p2, + r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance + operation aborts with MMU exception, it might cause the processor + to deadlock. This workaround puts DSB before executing ISB if + an abort may occur on cache maintenance. + endmenu source "arch/arm/common/Kconfig" diff --git a/arch/arm/configs/imx6_defconfig b/arch/arm/configs/imx6_defconfig index 5ad4a002676d..b6fd6b6810a5 100644 --- a/arch/arm/configs/imx6_defconfig +++ b/arch/arm/configs/imx6_defconfig @@ -382,6 +382,7 @@ CONFIG_ARM_ERRATA_751472=y # CONFIG_ARM_ERRATA_753970 is not set CONFIG_ARM_ERRATA_754322=y # CONFIG_ARM_ERRATA_754327 is not set +CONFIG_ARM_ERRATA_775420=y CONFIG_ARM_GIC=y # @@ -392,7 +393,7 @@ CONFIG_ARM_AMBA=y # CONFIG_ARCH_SUPPORTS_MSI is not set # CONFIG_PCCARD is not set CONFIG_ARM_ERRATA_764369=y -# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_PL310_ERRATA_769419=y # # Kernel Features diff --git a/arch/arm/configs/imx6_updater_defconfig b/arch/arm/configs/imx6_updater_defconfig index e562767d1133..2eea5275b841 100644 --- a/arch/arm/configs/imx6_updater_defconfig +++ b/arch/arm/configs/imx6_updater_defconfig @@ -391,6 +391,7 @@ CONFIG_ARM_ERRATA_751472=y # CONFIG_ARM_ERRATA_753970 is not set CONFIG_ARM_ERRATA_754322=y # CONFIG_ARM_ERRATA_754327 is not set +CONFIG_ARM_ERRATA_775420=y CONFIG_ARM_GIC=y # @@ -401,7 +402,7 @@ CONFIG_ARM_AMBA=y # CONFIG_ARCH_SUPPORTS_MSI is not set # CONFIG_PCCARD is not set # CONFIG_ARM_ERRATA_764369 is not set -# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_PL310_ERRATA_769419=y # # Kernel Features diff --git a/arch/arm/configs/imx6s_defconfig b/arch/arm/configs/imx6s_defconfig index 1cae0463855e..14e9ba52ee0a 100644 --- a/arch/arm/configs/imx6s_defconfig +++ b/arch/arm/configs/imx6s_defconfig @@ -384,6 +384,7 @@ CONFIG_CPU_HAS_PMU=y CONFIG_ARM_ERRATA_743622=y # CONFIG_ARM_ERRATA_753970 is not set CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_775420=y CONFIG_ARM_GIC=y # diff --git a/arch/arm/configs/imx6s_updater_defconfig b/arch/arm/configs/imx6s_updater_defconfig index b80f40128dfc..3fffe50065f3 100644 --- a/arch/arm/configs/imx6s_updater_defconfig +++ b/arch/arm/configs/imx6s_updater_defconfig @@ -385,6 +385,7 @@ CONFIG_CPU_HAS_PMU=y CONFIG_ARM_ERRATA_743622=y # CONFIG_ARM_ERRATA_753970 is not set CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_775420=y CONFIG_ARM_GIC=y # diff --git a/arch/arm/mach-mx6/board-mx6sl_arm2.c b/arch/arm/mach-mx6/board-mx6sl_arm2.c index a29f3bcb9b07..09d3c182ec45 100755 --- a/arch/arm/mach-mx6/board-mx6sl_arm2.c +++ b/arch/arm/mach-mx6/board-mx6sl_arm2.c @@ -877,6 +877,7 @@ static struct imx_epdc_fb_platform_data epdc_data = { .put_pins = epdc_put_pins, .enable_pins = epdc_enable_pins, .disable_pins = epdc_disable_pins, + .pg_display_mix = true, }; static int spdc_get_pins(void) @@ -1104,6 +1105,7 @@ static struct mxc_fb_platform_data fb_data[] = { .mode_str = "SEIKO-WVGA", .mode = video_modes, .num_modes = ARRAY_SIZE(video_modes), + .pg_display_mix = true, }, }; diff --git a/arch/arm/mach-mx6/board-mx6sl_evk.c b/arch/arm/mach-mx6/board-mx6sl_evk.c index adc8b463b78b..7561ba90fa15 100644 --- a/arch/arm/mach-mx6/board-mx6sl_evk.c +++ b/arch/arm/mach-mx6/board-mx6sl_evk.c @@ -1084,6 +1084,7 @@ static struct imx_epdc_fb_platform_data epdc_data = { .put_pins = epdc_put_pins, .enable_pins = epdc_enable_pins, .disable_pins = epdc_disable_pins, + .pg_display_mix = true, }; static int spdc_get_pins(void) @@ -1316,6 +1317,7 @@ static struct mxc_fb_platform_data wvga_fb_data[] = { .mode_str = "SEIKO-WVGA", .mode = wvga_video_modes, .num_modes = ARRAY_SIZE(wvga_video_modes), + .pg_display_mix = true, }, }; diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index 1bf20d5857c2..c69b4609d3f3 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -3788,6 +3788,17 @@ static struct clk enet_clk[] = { }, }; +static unsigned long _clk_enet_mdc_get_rate(struct clk *clk) +{ + return clk_get_rate(clk->parent); +} + +static struct clk enet_mdc_clk = { + __INIT_CLK_DEBUG(enet_mdc_clk) + .parent = &ipg_clk, + .get_rate = _clk_enet_mdc_get_rate, +}; + static struct clk ecspi_clk[] = { { __INIT_CLK_DEBUG(ecspi0_clk) @@ -5400,7 +5411,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm_clk[3]), _REGISTER_CLOCK(NULL, "pcie_clk", pcie_clk[0]), _REGISTER_CLOCK(NULL, "pcie_ep_clk", pcie_ep_clk[0]), - _REGISTER_CLOCK("enet.0", NULL, enet_clk[0]), + _REGISTER_CLOCK(NULL, "fec_clk", enet_clk[0]), + _REGISTER_CLOCK(NULL, "fec_mdc_clk", enet_mdc_clk), _REGISTER_CLOCK(NULL, "imx_sata_clk", sata_clk[0]), _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk[0]), _REGISTER_CLOCK(NULL, "usb_phy1_clk", usb_phy1_clk), diff --git a/arch/arm/mach-mx6/clock_mx6sl.c b/arch/arm/mach-mx6/clock_mx6sl.c index d8f33877bfe0..e95c45484362 100755 --- a/arch/arm/mach-mx6/clock_mx6sl.c +++ b/arch/arm/mach-mx6/clock_mx6sl.c @@ -89,6 +89,11 @@ DEFINE_SPINLOCK(mx6sl_clk_lock); #define MXC_TPRER 0x04 #define V2_TPRER_PRE24M_OFFSET 12 #define V2_TPRER_PRE24M_MASK 0xF +#define GPC_CNTR_OFFSET 0x0 +#define GPC_PGC_DISP_PGCR_OFFSET 0x240 +#define GPC_PGC_DISP_PUPSCR_OFFSET 0x244 +#define GPC_PGC_DISP_PDNSCR_OFFSET 0x248 +#define GPC_PGC_DISP_SR_OFFSET 0x24c /* We need to check the exp status again after timer expiration, * as there might be interrupt coming between the first time exp @@ -1899,6 +1904,33 @@ static struct clk i2c_clk[] = { }, }; +static int _display_mix_enable(struct clk *clk) +{ + if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { + __raw_writel(0x0, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); + __raw_writel(0x20, gpc_base + GPC_CNTR_OFFSET); + __raw_writel(0x1, gpc_base + GPC_PGC_DISP_SR_OFFSET); + } + return 0; +} + +static void _display_mix_disable(struct clk *clk) +{ + if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { + __raw_writel(0x101, gpc_base + GPC_PGC_DISP_PUPSCR_OFFSET); + __raw_writel(0x101, gpc_base + GPC_PGC_DISP_PDNSCR_OFFSET); + + __raw_writel(0x1, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); + __raw_writel(0x10, gpc_base + GPC_CNTR_OFFSET); + } +} + +static struct clk display_mix = { + __INIT_CLK_DEBUG(display_mix) + .enable = _display_mix_enable, + .disable = _display_mix_disable, +}; + static int _clk_ipu1_set_parent(struct clk *clk, struct clk *parent) { int mux; @@ -2037,6 +2069,7 @@ static struct clk ipu2_clk = { .set_rate = _clk_ipu2_set_rate, .get_rate = _clk_ipu2_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + .secondary = &display_mix, }; static struct clk usdhc_dep_clk = { @@ -2803,6 +2836,7 @@ static struct clk pxp_axi_clk = { .round_rate = _clk_pxp_epdc_axi_round_rate, .get_rate = _clk_pxp_axi_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + .secondary = &display_mix, }; static struct clk epdc_axi_clk = { @@ -2818,6 +2852,7 @@ static struct clk epdc_axi_clk = { .round_rate = _clk_pxp_epdc_axi_round_rate, .get_rate = _clk_epdc_axi_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + .secondary = &display_mix, }; static unsigned long _clk_lcdif_pix_get_rate(struct clk *clk) @@ -2967,6 +3002,7 @@ static struct clk lcdif_pix_clk = { .round_rate = _clk_epdc_lcdif_pix_round_rate, .get_rate = _clk_lcdif_pix_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + .secondary = &display_mix, }; static struct clk epdc_pix_clk = { @@ -2982,6 +3018,7 @@ static struct clk epdc_pix_clk = { .round_rate = _clk_epdc_lcdif_pix_round_rate, .get_rate = _clk_epdc_pix_get_rate, .flags = AHB_HIGH_SET_POINT | CPU_FREQ_TRIG_UPDATE, + .secondary = &display_mix, }; static unsigned long _clk_spdif_round_rate(struct clk *clk, unsigned long rate) @@ -3195,6 +3232,17 @@ static struct clk fec_clk[] = { }, }; +static unsigned long _clk_fec_mdc_get_rate(struct clk *clk) +{ + return clk_get_rate(clk->parent); +} + +static struct clk fec_mdc_clk = { + __INIT_CLK_DEBUG(fec_mdc_clk) + .parent = &ipg_clk, + .get_rate = _clk_fec_mdc_get_rate, +}; + static struct clk ecspi_clk[] = { { __INIT_CLK_DEBUG(ecspi0_clk) @@ -3974,7 +4022,8 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("mxc_pwm.1", NULL, pwm_clk[1]), _REGISTER_CLOCK("mxc_pwm.2", NULL, pwm_clk[2]), _REGISTER_CLOCK("mxc_pwm.3", NULL, pwm_clk[3]), - _REGISTER_CLOCK("fec.0", NULL, fec_clk[0]), + _REGISTER_CLOCK(NULL, "fec_clk", fec_clk[0]), + _REGISTER_CLOCK(NULL, "fec_mdc_clk", fec_mdc_clk), _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk[0]), _REGISTER_CLOCK(NULL, "usb_phy1_clk", usb_phy1_clk), _REGISTER_CLOCK(NULL, "usb_phy3_clk", usb_phy3_clk), diff --git a/arch/arm/mach-mx6/pm.c b/arch/arm/mach-mx6/pm.c index d9c04e11bed0..f2efa00efb47 100644 --- a/arch/arm/mach-mx6/pm.c +++ b/arch/arm/mach-mx6/pm.c @@ -50,11 +50,7 @@ #define GPC_ISR3_OFFSET 0x20 #define GPC_ISR4_OFFSET 0x24 #define GPC_CNTR_OFFSET 0x0 -#define GPC_PGC_DISP_PGCR_OFFSET 0x240 -#define GPC_PGC_DISP_PUPSCR_OFFSET 0x244 -#define GPC_PGC_DISP_PDNSCR_OFFSET 0x248 -#define GPC_PGC_DISP_SR_OFFSET 0x24c -#define GPC_PGC_GPU_PGCR_OFFSET 0x260 +#define GPC_PGC_DISP_PGCR_OFFSET 0x240 #define GPC_PGC_CPU_PDN_OFFSET 0x2a0 #define GPC_PGC_CPU_PUPSCR_OFFSET 0x2a4 #define GPC_PGC_CPU_PDNSCR_OFFSET 0x2a8 @@ -174,47 +170,6 @@ static void usb_power_up_handler(void) } -static void disp_power_down(void) -{ - if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { - - __raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PUPSCR_OFFSET); - __raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PDNSCR_OFFSET); - - __raw_writel(0x1, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); - __raw_writel(0x10, gpc_base + GPC_CNTR_OFFSET); - - /* Disable EPDC/LCDIF pix clock, and EPDC/LCDIF/PXP axi clock */ - __raw_writel(ccgr3 & - ~MXC_CCM_CCGRx_CG5_MASK & - ~MXC_CCM_CCGRx_CG4_MASK & - ~MXC_CCM_CCGRx_CG3_MASK & - ~MXC_CCM_CCGRx_CG2_MASK & - ~MXC_CCM_CCGRx_CG1_MASK, MXC_CCM_CCGR3); - - } -} - -static void disp_power_up(void) -{ - if (cpu_is_mx6sl() && (mx6sl_revision() >= IMX_CHIP_REVISION_1_2)) { - /* - * Need to enable EPDC/LCDIF pix clock, and - * EPDC/LCDIF/PXP axi clock before power up. - */ - __raw_writel(ccgr3 | - MXC_CCM_CCGRx_CG5_MASK | - MXC_CCM_CCGRx_CG4_MASK | - MXC_CCM_CCGRx_CG3_MASK | - MXC_CCM_CCGRx_CG2_MASK | - MXC_CCM_CCGRx_CG1_MASK, MXC_CCM_CCGR3); - - __raw_writel(0x0, gpc_base + GPC_PGC_DISP_PGCR_OFFSET); - __raw_writel(0x20, gpc_base + GPC_CNTR_OFFSET); - __raw_writel(0x1, gpc_base + GPC_PGC_DISP_SR_OFFSET); - } -} - static void mx6_suspend_store(void) { /* save some settings before suspend */ @@ -319,14 +274,12 @@ static int mx6_suspend_enter(suspend_state_t state) switch (state) { case PM_SUSPEND_MEM: - disp_power_down(); usb_power_down_handler(); mxc_cpu_lp_set(ARM_POWER_OFF); arm_pg = true; break; case PM_SUSPEND_STANDBY: if (cpu_is_mx6sl()) { - disp_power_down(); usb_power_down_handler(); mxc_cpu_lp_set(STOP_XTAL_ON); arm_pg = true; @@ -394,10 +347,8 @@ static int mx6_suspend_enter(suspend_state_t state) restore_gic_dist_state(0, &gds); restore_gic_cpu_state(0, &gcs); } - if (state == PM_SUSPEND_MEM || (cpu_is_mx6sl())) { + if (state == PM_SUSPEND_MEM || (cpu_is_mx6sl())) usb_power_up_handler(); - disp_power_up(); - } mx6_suspend_restore(); diff --git a/arch/arm/mach-mx6/usb_dr.c b/arch/arm/mach-mx6/usb_dr.c index e6496bc9cd50..c02158b4a2fc 100644 --- a/arch/arm/mach-mx6/usb_dr.c +++ b/arch/arm/mach-mx6/usb_dr.c @@ -248,10 +248,12 @@ static void enter_phy_lowpower_suspend(struct fsl_usb2_platform_data *pdata, boo usbotg_internal_phy_clock_gate(false); } else { - if (UOG_PORTSC1 & PORTSC_PHCD) { + if (UOG_PORTSC1 & PORTSC_PHCD) UOG_PORTSC1 &= ~PORTSC_PHCD; - mdelay(1); - } + + /* Wait PHY clock stable */ + mdelay(1); + usbotg_internal_phy_clock_gate(true); tmp = (BM_USBPHY_PWD_TXPWDFS | BM_USBPHY_PWD_TXPWDIBIAS diff --git a/arch/arm/mach-mx6/usb_h1.c b/arch/arm/mach-mx6/usb_h1.c index 6de99d96142b..657c1cb09b34 100644 --- a/arch/arm/mach-mx6/usb_h1.c +++ b/arch/arm/mach-mx6/usb_h1.c @@ -260,7 +260,7 @@ static void usbh1_platform_rh_resume_swfix(struct fsl_usb2_platform_data *pdata) { u32 index = 0; - if ((UOG_PORTSC1 & (PORTSC_PORT_SPEED_MASK)) != PORTSC_PORT_SPEED_HIGH) + if ((UH1_PORTSC1 & (PORTSC_PORT_SPEED_MASK)) != PORTSC_PORT_SPEED_HIGH) return ; while ((UH1_PORTSC1 & PORTSC_PORT_FORCE_RESUME) && (index < 1000)) { @@ -293,7 +293,7 @@ static void usbh1_platform_rh_resume(struct fsl_usb2_platform_data *pdata) /*for mx6sl ,we do not need any sw fix*/ if (cpu_is_mx6sl()) return ; - if ((UOG_PORTSC1 & (PORTSC_PORT_SPEED_MASK)) != PORTSC_PORT_SPEED_HIGH) + if ((UH1_PORTSC1 & (PORTSC_PORT_SPEED_MASK)) != PORTSC_PORT_SPEED_HIGH) return ; while ((UH1_PORTSC1 & PORTSC_PORT_FORCE_RESUME) && (index < 1000)) { @@ -332,10 +332,12 @@ static void _phy_lowpower_suspend(struct fsl_usb2_platform_data *pdata, bool ena usbh1_internal_phy_clock_gate(false); } else { - if (UH1_PORTSC1 & PORTSC_PHCD) { + if (UH1_PORTSC1 & PORTSC_PHCD) UH1_PORTSC1 &= ~PORTSC_PHCD; - mdelay(1); - } + + /* Wait PHY clock stable */ + mdelay(1); + usbh1_internal_phy_clock_gate(true); tmp = (BM_USBPHY_PWD_TXPWDFS | BM_USBPHY_PWD_TXPWDIBIAS diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 1ed1fd361308..428b2431c207 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -211,6 +211,9 @@ ENTRY(v7_coherent_user_range) * isn't mapped, just try the next page. */ 9001: +#ifdef CONFIG_ARM_ERRATA_775420 + dsb +#endif mov r12, r12, lsr #12 mov r12, r12, lsl #12 add r12, r12, #4096 diff --git a/arch/arm/plat-mxc/include/mach/epdc.h b/arch/arm/plat-mxc/include/mach/epdc.h index 36aac88230c8..08fef76148f3 100644 --- a/arch/arm/plat-mxc/include/mach/epdc.h +++ b/arch/arm/plat-mxc/include/mach/epdc.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. + * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -36,6 +36,7 @@ struct imx_epdc_fb_platform_data { void (*put_pins) (void); void (*enable_pins) (void); void (*disable_pins) (void); + bool pg_display_mix; }; struct imx_spdc_panel_init_set { |