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authorRob Kendrick <rob.kendrick@codethink.co.uk>2014-07-23 10:03:58 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-09-05 16:36:23 -0700
commitd1b28b69bc0961d7408a73d9219fa295c9d4e235 (patch)
treeedb9e1feb8f3ab1ba082fff3b42da348c56900ac /arch
parentf349e64de26e0c2bef7e7f957dd9b49e5e6146e6 (diff)
MIPS: math-emu: Fix instruction decoding.
commit c3b9b945e02e011c63522761e91133ea43eb6939 upstream. Tested-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/math-emu/cp1emu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 736c17a226e9..bf0fc6b16ad9 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1827,7 +1827,7 @@ dcopuop:
case -1:
if (cpu_has_mips_4_5_r)
- cbit = fpucondbit[MIPSInst_RT(ir) >> 2];
+ cbit = fpucondbit[MIPSInst_FD(ir) >> 2];
else
cbit = FPU_CSR_COND;
if (rv.w)