diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-10-18 16:06:31 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-10-18 16:06:31 +0200 |
| commit | 273a774ba14e9e947dcaa1b5dc26c6b9ed0386ef (patch) | |
| tree | 381aa99ef50d7e262b2b6fd888a51f7475b06bab /arch | |
| parent | 8204ed003296be17e0afa7997109fcf55f99ece4 (diff) | |
tegra: fix PWM clock
Fix PWM clock's special registry layout for parent clock.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index b1f1dd3f63c6..65434963d7d7 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -65,8 +65,9 @@ #define PERIPH_CLK_SOURCE_NUM \ ((PERIPH_CLK_SOURCE_OSC - PERIPH_CLK_SOURCE_I2S1) / 4) -#define PERIPH_CLK_SOURCE_MASK (3<<30) -#define PERIPH_CLK_SOURCE_SHIFT 30 +//special handling for pwm clock source, uses 3 bits 30:28 instead of 2 bits 31:30 +#define PERIPH_CLK_SOURCE_MASK ((c->reg) != 0x110 ? (3<<PERIPH_CLK_SOURCE_SHIFT) : (7<<PERIPH_CLK_SOURCE_SHIFT)) +#define PERIPH_CLK_SOURCE_SHIFT ((c->reg) != 0x110 ? 30 : 28) #define PERIPH_CLK_SOURCE_ENABLE (1<<28) #define PERIPH_CLK_SOURCE_DIVU71_MASK 0xFF #define PERIPH_CLK_SOURCE_DIVU16_MASK 0xFFFF |