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authorDan Willemsen <dwillemsen@nvidia.com>2011-06-10 20:23:16 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:46:44 -0800
commitc9d118ffef6fa95ecaac89303563b97256f4bcb9 (patch)
tree5590c8264e09e6bb0efee05e0c2bb5b9cc477d65 /arch
parenteb50c4b91e5afcae6a50201f554eae8524f932e6 (diff)
HACK: platsmp.c/pm-t3.c ignore compile errors
Rebase-Id: Ra4550b3ee066c825b3484bac1e928fe8c086e0c4
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/platsmp.c2
-rw-r--r--arch/arm/mach-tegra/pm-t3.c4
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 7b7f420d1f8a..5d150cb1907b 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -193,6 +193,7 @@ static int power_up_cpu(unsigned int cpu)
* for confirmation that cpu is powered and remove clamps.
* On first boot entry do not wait - go to direct ungate.
*/
+#if 0 /* FIXME! */
if (cpu_isset(cpu,*(cpumask_t*)&tegra_cpu_init_map))
{
timeout = jiffies + HZ;
@@ -202,6 +203,7 @@ static int power_up_cpu(unsigned int cpu)
udelay(10);
} while (time_before(jiffies, timeout));
}
+#endif
/* 1'st boot or Flow controller did not work as expected - try directly toggle
power gates. Bail out if direct power on also failed */
if (!is_cpu_powered(cpu))
diff --git a/arch/arm/mach-tegra/pm-t3.c b/arch/arm/mach-tegra/pm-t3.c
index 92209dc308fa..f67e4dc9b43f 100644
--- a/arch/arm/mach-tegra/pm-t3.c
+++ b/arch/arm/mach-tegra/pm-t3.c
@@ -300,13 +300,17 @@ int tegra_cluster_control(unsigned int us, unsigned int flags)
local_irq_disable();
if (flags & TEGRA_POWER_SDRAM_SELFREFRESH) {
+#if 0 /* FIXME! */
if (us)
tegra_lp2_set_trigger(us);
+#endif
tegra_suspend_dram(false, flags);
+#if 0 /* FIXME! */
if (us)
tegra_lp2_set_trigger(0);
+#endif
} else
tegra_idle_lp2_last(flags);
local_irq_enable();