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authorZhang Jiejing <jiejing.zhang@freescale.com>2010-12-08 20:24:04 +0800
committerZhang Jiejing <jiejing.zhang@freescale.com>2011-01-07 11:34:46 +0800
commit232e7db164755d1ada070aa49cb7cfd75ad847fe (patch)
tree21dba10f598b53b1087bf64befea923231c220a8 /arch
parenta366a8fda1ad705c0407647410203183aa758e57 (diff)
ENGR00137669-3 MX53_SMD: workaround for UART have problem when DMA enable.
There is a clock issue when UART3 enable DMA, so disable this. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx5/serial.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-mx5/serial.h b/arch/arm/mach-mx5/serial.h
index d7a433762259..9fbb0b33e4eb 100644
--- a/arch/arm/mach-mx5/serial.h
+++ b/arch/arm/mach-mx5/serial.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -51,7 +51,7 @@
#define UART2_UFCR_TXTL 16
/* UART 3 configuration */
#define UART3_UCR4_CTSTL 16
-#define UART3_DMA_ENABLE 1
+#define UART3_DMA_ENABLE 0
#define UART3_DMA_RXBUFSIZE 1024
#define UART3_UFCR_RXTL 16
#define UART3_UFCR_TXTL 16