ENGR00137983 MX53: Update CPU working points

- Set working points for different part numbers according
to RevD datasheet.
- Put MX53 working point settings in new files.
- For Auto, only 800MHZ working point is added. Since the SW uses
PLL1 to judge chip part number now, the chip will be treated as
auto chip if the user set PLL1 as 800MHZ in U-Boot. If there is a
better way to get part number information, we will revise part
number setting codes in clock.c.
- The voltages for 160MHZ is "TBD" in datasheet. Set it as
0.9V firstly.
- To run 1.2GHZ CPU, do as the following in U-Boot:
i2c mw 0x48 0x2e 0x60
clk core 1200
Before executing the command, you must ensure your chip is
1.2GHZ chip

Signed-off-by: Lily Zhang <r58066@freescale.com>

9 files changed, 233 insertions, 257 deletions

diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 063f609cb0b8..fb72f5287801 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -7,7 +7,7 @@ obj-y   := system.o iomux.o cpu.o mm.o devices.o serial.o dma.o lpmodes.o pm.o \
 sdram_autogating.o bus_freq.o usb_dr.o usb_h1.o usb_h2.o dummy_gpio.o  early_setup.o
 
 obj-$(CONFIG_ARCH_MX51) += clock.o suspend.o
-obj-$(CONFIG_ARCH_MX53) += clock.o suspend.o
+obj-$(CONFIG_ARCH_MX53) += clock.o suspend.o mx53_wp.o
 obj-$(CONFIG_ARCH_MX50) += clock_mx50.o dmaengine.o dma-apbh.o mx50_suspend.o mx50_ddr_freq.o mx50_wfi.o
 
 obj-$(CONFIG_MACH_MX51_3DS) += mx51_3stack.o mx51_3stack_gpio.o mx51_3stack_pmic_mc13892.o
diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c
index 79974fb1fce1..8e132c2af940 100644
--- a/arch/arm/mach-mx5/clock.c
+++ b/arch/arm/mach-mx5/clock.c
@@ -31,6 +31,7 @@
 
 #include "crm_regs.h"
 #include "serial.h"
+#include "mx53_wp.h"
 
 /* External clock values passed-in by the board code */
 static unsigned long external_high_reference, external_low_reference;
@@ -4764,7 +4765,6 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long
 	__iomem void *base;
 	struct clk *tclk;
 	int i = 0, j = 0, reg;
-	int wp_cnt = 0;
 	u32 pll1_rate;
 
 	pll1_base = ioremap(MX53_BASE_ADDR(PLL1_BASE_ADDR), SZ_4K);
@@ -4979,62 +4979,22 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, unsigned long
 	clk_set_parent(&ieee_rtc_clk, &pll3_sw_clk);
 	clk_set_rate(&ieee_rtc_clk, 108000000);
 
-	/* Set the current working point. */
-	cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr);
-	/* Update the cpu working point table based on the PLL1 freq
+	/* The CPU working point should be set according to part number
+	 * information. But part number information is not clear now.
+	 * So update the cpu working point table based on the PLL1 freq
 	 * at boot time
 	 */
 	pll1_rate = clk_get_rate(&pll1_main_clk);
-	if (pll1_rate <= cpu_wp_tbl[cpu_wp_nr - 1].cpu_rate)
-		wp_cnt = 1;
-	else if (pll1_rate <= cpu_wp_tbl[1].cpu_rate &&
-				pll1_rate > cpu_wp_tbl[2].cpu_rate)
-		wp_cnt = cpu_wp_nr - 1;
-	else
-		wp_cnt = cpu_wp_nr;
 
-	cpu_wp_tbl[0].cpu_rate = pll1_rate;
-
-	if (wp_cnt == 1) {
-		cpu_wp_tbl[0] = cpu_wp_tbl[cpu_wp_nr - 1];
-		memset(&cpu_wp_tbl[cpu_wp_nr - 1], 0, sizeof(struct cpu_wp));
-		memset(&cpu_wp_tbl[cpu_wp_nr - 2], 0, sizeof(struct cpu_wp));
-	} else if (wp_cnt < cpu_wp_nr) {
-		for (i = 0; i < wp_cnt; i++)
-			cpu_wp_tbl[i] = cpu_wp_tbl[i+1];
-		memset(&cpu_wp_tbl[i], 0, sizeof(struct cpu_wp));
-	}
-
-	if (wp_cnt < cpu_wp_nr) {
-		set_num_cpu_wp(wp_cnt);
-		cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr);
-	}
+	if (pll1_rate > 1000000000)
+		mx53_set_cpu_part_number(IMX53_CEC_1_2G);
+	else if (pll1_rate > 800000000)
+		mx53_set_cpu_part_number(IMX53_CEC);
+	else
+		mx53_set_cpu_part_number(IMX53_AEC);
 
-	pll1_rate = clk_get_rate(&pll1_main_clk);
-	for (j = 0; j < cpu_wp_nr; j++) {
-		if ((ddr_clk.parent == &ddr_hf_clk)) {
-			/* Change the CPU podf divider based on the boot up
-			 * pll1 rate.
-			 */
-			cpu_wp_tbl[j].cpu_podf =
-				(pll1_rate / cpu_wp_tbl[j].cpu_rate)
-				- 1;
-			if (pll1_rate / (cpu_wp_tbl[j].cpu_podf + 1) >
-					cpu_wp_tbl[j].cpu_rate) {
-				cpu_wp_tbl[j].cpu_podf++;
-				cpu_wp_tbl[j].cpu_rate =
-					 pll1_rate /
-					 (1000 * (cpu_wp_tbl[j].cpu_podf + 1));
-				cpu_wp_tbl[j].cpu_rate *= 1000;
-			}
-			if (pll1_rate / (cpu_wp_tbl[j].cpu_podf + 1) <
-						cpu_wp_tbl[j].cpu_rate) {
-				cpu_wp_tbl[j].cpu_rate = pll1_rate;
-			}
-		}
-	cpu_wp_tbl[j].pll_rate = pll1_rate;
-	}
 	/* Set the current working point. */
+	cpu_wp_tbl = get_cpu_wp(&cpu_wp_nr);
 	for (i = 0; i < cpu_wp_nr; i++) {
 		if (clk_get_rate(&cpu_clk) == cpu_wp_tbl[i].cpu_rate) {
 			cpu_curr_wp = i;
diff --git a/arch/arm/mach-mx5/mx53_ard.c b/arch/arm/mach-mx5/mx53_ard.c
index 97eecabf5a2a..9da099fc6882 100644
--- a/arch/arm/mach-mx5/mx53_ard.c
+++ b/arch/arm/mach-mx5/mx53_ard.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -123,9 +123,6 @@
  *
  * @ingroup MSL_MX53
  */
-extern struct cpu_wp *(*get_cpu_wp)(int *wp);
-extern void (*set_num_cpu_wp)(int num);
-static int num_cpu_wp = 3;
 
 static struct pad_desc mx53ard_pads[] = {
 	/* UART1 */
@@ -361,38 +358,6 @@ static struct pad_desc mx53ard_pads[] = {
 	/* EIM_WAIT, EIM_OE ... */
 };
 
-
-/* working point(wp): 0 - 800MHz; 1 - 166.25MHz; */
-static struct cpu_wp cpu_wp_auto[] = {
-	{
-	 .pll_rate = 1000000000,
-	 .cpu_rate = 1000000000,
-	 .pdf = 0,
-	 .mfi = 10,
-	 .mfd = 11,
-	 .mfn = 5,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1150000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 800000000,
-	 .pdf = 0,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1050000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 160000000,
-	 .pdf = 4,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 4,
-	 .cpu_voltage = 1000000,},
-};
-
 static struct fb_videomode video_modes[] = {
 	{
 	 /* NTSC TV output */
@@ -453,18 +418,6 @@ static struct fb_videomode video_modes[] = {
 	 0,},
 };
 
-struct cpu_wp *mx53_ard_get_cpu_wp(int *wp)
-{
-	*wp = num_cpu_wp;
-	return cpu_wp_auto;
-}
-
-void mx53_ard_set_num_cpu_wp(int num)
-{
-	num_cpu_wp = num;
-	return;
-}
-
 static struct pad_desc mx53_ard_pwm_pads[] = {
 	MX53_PAD_DISP0_DAT8__PWM1,
 	MX53_PAD_DISP0_DAT9__PWM2,
@@ -618,7 +571,6 @@ static struct mxc_dvfs_platform_data dvfs_core_data = {
 	.upcnt_val = 10,
 	.dncnt_val = 10,
 	.delay_time = 30,
-	.num_wp = 3,
 };
 
 static struct mxc_bus_freq_platform_data bus_freq_data = {
@@ -1078,9 +1030,6 @@ static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
 
 	mxc_set_cpu_type(MXC_CPU_MX53);
 
-	get_cpu_wp = mx53_ard_get_cpu_wp;
-	set_num_cpu_wp = mx53_ard_set_num_cpu_wp;
-
 	for_each_tag(mem_tag, tags) {
 		if (mem_tag->hdr.tag == ATAG_MEM) {
 			total_mem = mem_tag->u.mem.size;
diff --git a/arch/arm/mach-mx5/mx53_evk.c b/arch/arm/mach-mx5/mx53_evk.c
index 1d7b95ea5d19..c48355aaadab 100644
--- a/arch/arm/mach-mx5/mx53_evk.c
+++ b/arch/arm/mach-mx5/mx53_evk.c
@@ -107,9 +107,6 @@
  * @ingroup MSL_MX53
  */
 extern int __init mx53_evk_init_mc13892(void);
-extern struct cpu_wp *(*get_cpu_wp)(int *wp);
-extern void (*set_num_cpu_wp)(int num);
-static int num_cpu_wp = 3;
 
 static struct pad_desc mx53common_pads[] = {
 	MX53_PAD_EIM_WAIT__GPIO_5_0,
@@ -398,37 +395,6 @@ static struct pad_desc mx53_nand_pads[] = {
 	MX53_PAD_EIM_DA7__EIM_DA7,
 };
 
-/* working point(wp): 0 - 800MHz; 1 - 166.25MHz; */
-static struct cpu_wp cpu_wp_auto[] = {
-	{
-	 .pll_rate = 1000000000,
-	 .cpu_rate = 1000000000,
-	 .pdf = 0,
-	 .mfi = 10,
-	 .mfd = 11,
-	 .mfn = 5,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1150000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 800000000,
-	 .pdf = 0,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1050000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 160000000,
-	 .pdf = 4,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 4,
-	 .cpu_voltage = 850000,},
-};
-
 static struct fb_videomode video_modes[] = {
 	{
 	 /* NTSC TV output */
@@ -552,18 +518,6 @@ static struct fb_videomode video_modes[] = {
 	 0,},
 };
 
-struct cpu_wp *mx53_evk_get_cpu_wp(int *wp)
-{
-	*wp = num_cpu_wp;
-	return cpu_wp_auto;
-}
-
-void mx53_evk_set_num_cpu_wp(int num)
-{
-	num_cpu_wp = num;
-	return;
-}
-
 static struct mxc_w1_config mxc_w1_data = {
 	.search_rom_accelerator = 1,
 };
@@ -755,7 +709,6 @@ static struct mxc_dvfs_platform_data dvfs_core_data = {
 	.upcnt_val = 10,
 	.dncnt_val = 10,
 	.delay_time = 30,
-	.num_wp = 3,
 };
 
 static struct mxc_bus_freq_platform_data bus_freq_data = {
@@ -1345,9 +1298,6 @@ static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
 
 	mxc_set_cpu_type(MXC_CPU_MX53);
 
-	get_cpu_wp = mx53_evk_get_cpu_wp;
-	set_num_cpu_wp = mx53_evk_set_num_cpu_wp;
-
 	for_each_tag(mem_tag, tags) {
 		if (mem_tag->hdr.tag == ATAG_MEM) {
 			total_mem = mem_tag->u.mem.size;
diff --git a/arch/arm/mach-mx5/mx53_loco.c b/arch/arm/mach-mx5/mx53_loco.c
index 5d55c5f851be..1d7e600fcb11 100644
--- a/arch/arm/mach-mx5/mx53_loco.c
+++ b/arch/arm/mach-mx5/mx53_loco.c
@@ -103,9 +103,6 @@
 #define USB_PWREN			(6*32 + 8)	/* GPIO_7_8 */
 #define NIRQ				(6*32 + 11)	/* GPIO7_11 */
 
-extern struct cpu_wp *(*get_cpu_wp)(int *wp);
-extern void (*set_num_cpu_wp)(int num);
-static int num_cpu_wp = 3;
 extern int __init mx53_loco_init_da9052(void);
 
 static struct pad_desc mx53_loco_pads[] = {
@@ -251,37 +248,6 @@ static struct pad_desc mx53_loco_pads[] = {
 	MX53_PAD_GPIO_8__GPIO_1_8,
 };
 
-/* working point(wp)*/
-static struct cpu_wp cpu_wp_auto[] = {
-	{
-	 .pll_rate = 1000000000,
-	 .cpu_rate = 1000000000,
-	 .pdf = 0,
-	 .mfi = 10,
-	 .mfd = 11,
-	 .mfn = 5,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1150000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 800000000,
-	 .pdf = 0,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1050000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 160000000,
-	 .pdf = 4,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 4,
-	 .cpu_voltage = 850000,},
-};
-
 static struct fb_videomode video_modes[] = {
 	{
 	 /* NTSC TV output */
@@ -405,18 +371,6 @@ static struct fb_videomode video_modes[] = {
 	 0,},
 };
 
-struct cpu_wp *mx53_loco_get_cpu_wp(int *wp)
-{
-	*wp = num_cpu_wp;
-	return cpu_wp_auto;
-}
-
-void mx53_loco_set_num_cpu_wp(int num)
-{
-	num_cpu_wp = num;
-	return;
-}
-
 static struct platform_pwm_backlight_data mxc_pwm_backlight_data = {
 	.pwm_id = 1,
 	.max_brightness = 255,
@@ -461,7 +415,6 @@ static struct mxc_dvfs_platform_data dvfs_core_data = {
 	.upcnt_val = 10,
 	.dncnt_val = 10,
 	.delay_time = 30,
-	.num_wp = 3,
 };
 
 static struct mxc_bus_freq_platform_data bus_freq_data = {
@@ -779,9 +732,6 @@ static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
 
 	mxc_set_cpu_type(MXC_CPU_MX53);
 
-	get_cpu_wp = mx53_loco_get_cpu_wp;
-	set_num_cpu_wp = mx53_loco_set_num_cpu_wp;
-
 	for_each_tag(mem_tag, tags) {
 		if (mem_tag->hdr.tag == ATAG_MEM) {
 			total_mem = mem_tag->u.mem.size;
diff --git a/arch/arm/mach-mx5/mx53_smd.c b/arch/arm/mach-mx5/mx53_smd.c
index 8762cb46ce63..2c603c4ca590 100644
--- a/arch/arm/mach-mx5/mx53_smd.c
+++ b/arch/arm/mach-mx5/mx53_smd.c
@@ -150,10 +150,6 @@
 #define MX53_SMD_PMIC_INT			(6*32 + 11)	/* GPIO_7_11 */
 #define MX53_SMD_CAP_TCH_FUN1		(6*32 + 13)	/* GPIO_7_13 */
 
-
-extern struct cpu_wp *(*get_cpu_wp)(int *wp);
-extern void (*set_num_cpu_wp)(int num);
-static int num_cpu_wp = 3;
 extern int __init mx53_smd_init_da9052(void);
 
 static struct pad_desc mx53_smd_pads[] = {
@@ -420,37 +416,6 @@ static struct pad_desc mx53_smd_pads[] = {
 	MX53_PAD_LVDS1_TX0_P__LVDS1_TX0,
 };
 
-/* working point(wp): 0 - 800MHz; 1 - 166.25MHz; */
-static struct cpu_wp cpu_wp_auto[] = {
-	{
-	 .pll_rate = 1000000000,
-	 .cpu_rate = 1000000000,
-	 .pdf = 0,
-	 .mfi = 10,
-	 .mfd = 11,
-	 .mfn = 5,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1150000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 800000000,
-	 .pdf = 0,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 0,
-	 .cpu_voltage = 1050000,},
-	{
-	 .pll_rate = 800000000,
-	 .cpu_rate = 160000000,
-	 .pdf = 4,
-	 .mfi = 8,
-	 .mfd = 2,
-	 .mfn = 1,
-	 .cpu_podf = 4,
-	 .cpu_voltage = 850000,},
-};
-
 static struct fb_videomode video_modes[] = {
 	{
 	 /* NTSC TV output */
@@ -574,18 +539,6 @@ static struct fb_videomode video_modes[] = {
 	 0,},
 };
 
-struct cpu_wp *mx53_smd_get_cpu_wp(int *wp)
-{
-	*wp = num_cpu_wp;
-	return cpu_wp_auto;
-}
-
-void mx53_smd_set_num_cpu_wp(int num)
-{
-	num_cpu_wp = num;
-	return;
-}
-
 static struct platform_pwm_backlight_data mxc_pwm_backlight_data = {
 	.pwm_id = 1,
 	.max_brightness = 255,
@@ -638,7 +591,6 @@ static struct mxc_dvfs_platform_data dvfs_core_data = {
 	.upcnt_val = 10,
 	.dncnt_val = 10,
 	.delay_time = 30,
-	.num_wp = 3,
 };
 
 static struct mxc_bus_freq_platform_data bus_freq_data = {
@@ -1034,9 +986,6 @@ static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
 
 	mxc_set_cpu_type(MXC_CPU_MX53);
 
-	get_cpu_wp = mx53_smd_get_cpu_wp;
-	set_num_cpu_wp = mx53_smd_set_num_cpu_wp;
-
 	for_each_tag(mem_tag, tags) {
 		if (mem_tag->hdr.tag == ATAG_MEM) {
 			total_mem = mem_tag->u.mem.size;
diff --git a/arch/arm/mach-mx5/mx53_wp.c b/arch/arm/mach-mx5/mx53_wp.c
new file mode 100644
index 000000000000..fd6813ace540
--- /dev/null
+++ b/arch/arm/mach-mx5/mx53_wp.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <mach/hardware.h>
+#include "mx53_wp.h"
+
+/*!
+ * @file mach-mx5/mx53_wp.c
+ *
+ * @brief This file contains the information about MX53 CPU working points.
+ *
+ * @ingroup MSL_MX53
+ */
+extern struct cpu_wp *(*get_cpu_wp)(int *wp);
+extern void (*set_num_cpu_wp)(int num);
+static int num_cpu_wp;
+static struct cpu_wp *cpu_wp_table;
+
+/* working point for auto*/
+static struct cpu_wp cpu_wp_aec[] = {
+	{
+	 .pll_rate = 800000000,
+	 .cpu_rate = 800000000,
+	 .pdf = 0,
+	 .mfi = 8,
+	 .mfd = 2,
+	 .mfn = 1,
+	 .cpu_podf = 0,
+	 .cpu_voltage = 1050000,},
+};
+
+/* working point for consumer 1G*/
+static struct cpu_wp cpu_wp_ces[] = {
+	{
+	 .pll_rate = 1000000000,
+	 .cpu_rate = 1000000000,
+	 .pdf = 0,
+	 .mfi = 10,
+	 .mfd = 11,
+	 .mfn = 5,
+	 .cpu_podf = 0,
+	 .cpu_voltage = 1200000,},
+	{
+	 .pll_rate = 800000000,
+	 .cpu_rate = 800000000,
+	 .pdf = 0,
+	 .mfi = 8,
+	 .mfd = 2,
+	 .mfn = 1,
+	 .cpu_podf = 0,
+	 .cpu_voltage = 1050000,},
+	 {
+	  .pll_rate = 800000000,
+	  .cpu_rate = 400000000,
+	  .pdf = 1,
+	  .mfi = 8,
+	  .mfd = 2,
+	  .mfn = 1,
+	  .cpu_podf = 1,
+	  .cpu_voltage = 950000,},
+	{
+	 .pll_rate = 800000000,
+	 .cpu_rate = 160000000,
+	 .pdf = 4,
+	 .mfi = 8,
+	 .mfd = 2,
+	 .mfn = 1,
+	 .cpu_podf = 4,
+	 .cpu_voltage = 900000,},
+};
+
+/* working point for consumer 1.2G*/
+static struct cpu_wp cpu_wp_ces_1_2g[] = {
+	{
+	 .pll_rate = 1200000000,
+	 .cpu_rate = 1200000000,
+	 .pdf = 0,
+	 .mfi = 12,
+	 .mfd = 1,
+	 .mfn = 1,
+	 .cpu_podf = 0,
+	 .cpu_voltage = 1300000,},
+	{
+	 .pll_rate = 1000000000,
+	 .cpu_rate = 1000000000,
+	 .pdf = 0,
+	 .mfi = 10,
+	 .mfd = 11,
+	 .mfn = 5,
+	 .cpu_podf = 0,
+	 .cpu_voltage = 1200000,},
+	{
+	 .pll_rate = 800000000,
+	 .cpu_rate = 800000000,
+	 .pdf = 0,
+	 .mfi = 8,
+	 .mfd = 2,
+	 .mfn = 1,
+	 .cpu_podf = 0,
+	 .cpu_voltage = 1050000,},
+	 {
+	  .pll_rate = 800000000,
+	  .cpu_rate = 400000000,
+	  .pdf = 1,
+	  .mfi = 8,
+	  .mfd = 2,
+	  .mfn = 1,
+	  .cpu_podf = 1,
+	  .cpu_voltage = 950000,},
+	{
+	 .pll_rate = 800000000,
+	 .cpu_rate = 160000000,
+	 .pdf = 4,
+	 .mfi = 8,
+	 .mfd = 2,
+	 .mfn = 1,
+	 .cpu_podf = 4,
+	 .cpu_voltage = 900000,},
+};
+
+
+struct cpu_wp *mx53_get_cpu_wp(int *wp)
+{
+	*wp = num_cpu_wp;
+	return cpu_wp_table;
+}
+
+void mx53_set_num_cpu_wp(int num)
+{
+	num_cpu_wp = num;
+	return;
+}
+
+void mx53_set_cpu_part_number(enum mx53_cpu_part_number part_num)
+{
+	get_cpu_wp = mx53_get_cpu_wp;
+	set_num_cpu_wp = mx53_set_num_cpu_wp;
+
+	switch (part_num) {
+	case IMX53_CEC_1_2G:
+		cpu_wp_table = cpu_wp_ces_1_2g;
+		num_cpu_wp = ARRAY_SIZE(cpu_wp_ces_1_2g);
+		break;
+	case IMX53_CEC:
+		cpu_wp_table = cpu_wp_ces;
+		num_cpu_wp = ARRAY_SIZE(cpu_wp_ces);
+		break;
+	case IMX53_AEC:
+	default:
+		cpu_wp_table = cpu_wp_aec;
+		num_cpu_wp = ARRAY_SIZE(cpu_wp_aec);
+		break;
+	}
+}
+
+
diff --git a/arch/arm/mach-mx5/mx53_wp.h b/arch/arm/mach-mx5/mx53_wp.h
new file mode 100644
index 000000000000..353b5320a1b8
--- /dev/null
+++ b/arch/arm/mach-mx5/mx53_wp.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifndef __ARCH_ARM_MACH_MX53_WP_H__
+#define  __ARCH_ARM_MACH_MX53_WP_H__
+#include <linux/types.h>
+
+/*!
+ * @file mach-mx5/mx53_wp.h
+ *
+ * @brief This file contains the information about MX53 CPU working points.
+ *
+ * @ingroup MSL_MX53
+ */
+enum mx53_cpu_part_number {
+  IMX53_AEC,  /* automative and infotainment AP */
+  IMX53_CEC,  /* Consumer AP, CPU freq is up to 1G */
+  IMX53_CEC_1_2G, /* Consumer AP, CPU freq is up to 1.2GHZ */
+};
+
+void mx53_set_cpu_part_number(enum mx53_cpu_part_number part_num);
+
+#endif /*__ARCH_ARM_MACH_MX53_WP_H__ */
+
+
+
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index fe3277528d7c..5ba4a71d745e 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -47,7 +47,7 @@ int cpufreq_trig_needed;
 static struct clk *cpu_clk;
 static struct regulator *gp_regulator;
 static struct cpu_wp *cpu_wp_tbl;
-static struct cpufreq_frequency_table imx_freq_table[4];
+static struct cpufreq_frequency_table imx_freq_table[6];
 extern int low_bus_freq_mode;
 extern int high_bus_freq_mode;
 extern int dvfs_core_is_active;