ENGR00137924-2: MX50EVK: Improve board level suspend mode power.

Fix many IOMUX pad settings so that the suspend power is improved.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

2 files changed, 116 insertions, 15 deletions

diff --git a/arch/arm/mach-mx5/mx50_rdp.c b/arch/arm/mach-mx5/mx50_rdp.c
index c7029e8a1e8d..659c9b13b48c 100644
--- a/arch/arm/mach-mx5/mx50_rdp.c
+++ b/arch/arm/mach-mx5/mx50_rdp.c
@@ -306,6 +306,8 @@ static struct pad_desc  mx50_rdp[] = {
 	MX50_PAD_EIM_BCLK__GPIO_1_22,
 	MX50_PAD_EIM_RDY__GPIO_1_23,
 	MX50_PAD_EIM_OE__GPIO_1_24,
+	MX50_PAD_EIM_RW__GPIO_1_25,
+	MX50_PAD_EIM_LBA__GPIO_1_26,
 };
 
 static struct pad_desc  mx50_gpmi_nand[] = {
@@ -337,19 +339,95 @@ static struct pad_desc  suspend_enter_pads[] = {
 	MX50_PAD_EIM_DA3__GPIO_1_3,
 	MX50_PAD_EIM_DA4__GPIO_1_4,
 	MX50_PAD_EIM_DA5__GPIO_1_5,
+	MX50_PAD_EIM_DA6__GPIO_1_6,
 	MX50_PAD_EIM_DA7__GPIO_1_7,
-};
 
-static struct pad_desc  suspend_exit_pads[] = {
-	MX50_PAD_EIM_DA0__KEY_COL4,
-	MX50_PAD_EIM_DA1__KEY_ROW4,
-	MX50_PAD_EIM_DA2__KEY_COL5,
-	MX50_PAD_EIM_DA3__KEY_ROW5,
-	MX50_PAD_EIM_DA4__KEY_COL6,
-	MX50_PAD_EIM_DA5__KEY_ROW6,
-	MX50_PAD_EIM_DA7__KEY_ROW7,
+	MX50_PAD_EIM_DA8__GPIO_1_8,
+	MX50_PAD_EIM_DA9__GPIO_1_9,
+	MX50_PAD_EIM_DA10__GPIO_1_10,
+	MX50_PAD_EIM_DA11__GPIO_1_11,
+	MX50_PAD_EIM_DA12__GPIO_1_12,
+	MX50_PAD_EIM_DA13__GPIO_1_13,
+	MX50_PAD_EIM_DA14__GPIO_1_14,
+	MX50_PAD_EIM_DA15__GPIO_1_15,
+	MX50_PAD_EIM_CS2__GPIO_1_16,
+	MX50_PAD_EIM_CS1__GPIO_1_17,
+	MX50_PAD_EIM_CS0__GPIO_1_18,
+	MX50_PAD_EIM_EB0__GPIO_1_19,
+	MX50_PAD_EIM_EB1__GPIO_1_20,
+	MX50_PAD_EIM_WAIT__GPIO_1_21,
+	MX50_PAD_EIM_BCLK__GPIO_1_22,
+	MX50_PAD_EIM_RDY__GPIO_1_23,
+	MX50_PAD_EIM_OE__GPIO_1_24,
+	MX50_PAD_EIM_RW__GPIO_1_25,
+	MX50_PAD_EIM_LBA__GPIO_1_26,
+	MX50_PAD_EIM_CRE__GPIO_1_27,
+
+	/* NVCC_NANDF pads */
+	MX50_PAD_DISP_D8__GPIO_2_8,
+	MX50_PAD_DISP_D9__GPIO_2_9,
+	MX50_PAD_DISP_D10__GPIO_2_10,
+	MX50_PAD_DISP_D11__GPIO_2_11,
+	MX50_PAD_DISP_D12__GPIO_2_12,
+	MX50_PAD_DISP_D13__GPIO_2_13,
+	MX50_PAD_DISP_D14__GPIO_2_14,
+	MX50_PAD_DISP_D15__GPIO_2_15,
+	MX50_PAD_SD3_CMD__GPIO_5_18,
+	MX50_PAD_SD3_CLK__GPIO_5_19,
+	MX50_PAD_SD3_D0__GPIO_5_20,
+	MX50_PAD_SD3_D1__GPIO_5_21,
+	MX50_PAD_SD3_D2__GPIO_5_22,
+	MX50_PAD_SD3_D3__GPIO_5_23,
+	MX50_PAD_SD3_D4__GPIO_5_24,
+	MX50_PAD_SD3_D5__GPIO_5_25,
+	MX50_PAD_SD3_D6__GPIO_5_26,
+	MX50_PAD_SD3_D7__GPIO_5_27,
+	MX50_PAD_SD3_WP__GPIO_5_28,
+
+	/* NVCC_LCD pads */
+	MX50_PAD_DISP_D0__GPIO_2_0,
+	MX50_PAD_DISP_D1__GPIO_2_1,
+	MX50_PAD_DISP_D2__GPIO_2_2,
+	MX50_PAD_DISP_D3__GPIO_2_3,
+	MX50_PAD_DISP_D4__GPIO_2_4,
+	MX50_PAD_DISP_D5__GPIO_2_5,
+	MX50_PAD_DISP_D6__GPIO_2_6,
+	MX50_PAD_DISP_D7__GPIO_2_7,
+	MX50_PAD_DISP_WR__GPIO_2_16,
+	MX50_PAD_DISP_RS__GPIO_2_17,
+	MX50_PAD_DISP_BUSY__GPIO_2_18,
+	MX50_PAD_DISP_RD__GPIO_2_19,
+	MX50_PAD_DISP_RESET__GPIO_2_20,
+	MX50_PAD_DISP_CS__GPIO_2_21,
+
+	/* CSPI pads */
+	MX50_PAD_CSPI_SCLK__GPIO_4_8,
+	MX50_PAD_CSPI_MOSI__GPIO_4_9,
+	MX50_PAD_CSPI_MISO__GPIO_4_10,
+	MX50_PAD_CSPI_SS0__GPIO_4_11,
+
+	/*NVCC_MISC pins as GPIO */
+	MX50_PAD_I2C1_SCL__GPIO_6_18,
+	MX50_PAD_I2C1_SDA__GPIO_6_19,
+	MX50_PAD_I2C2_SCL__GPIO_6_20,
+	MX50_PAD_I2C2_SDA__GPIO_6_21,
+	MX50_PAD_I2C3_SCL__GPIO_6_22,
+	MX50_PAD_I2C3_SDA__GPIO_6_23,
+
+	/* NVCC_MISC_PWM_USB_OTG pins */
+	MX50_PAD_PWM1__GPIO_6_24,
+	MX50_PAD_PWM2__GPIO_6_25,
+	MX50_PAD_EPITO__GPIO_6_27,
+	MX50_PAD_WDOG__GPIO_6_28,
+
+	/* FEC related. */
+	MX50_PAD_EPDC_D10__GPIO_3_10,
+	MX50_PAD_SSI_RXC__GPIO_6_5,
+	MX50_PAD_SSI_RXFS__GPIO_6_4,
 };
 
+static struct pad_desc  suspend_exit_pads[ARRAY_SIZE(suspend_enter_pads)];
+
 static struct mxc_dvfs_platform_data dvfs_core_data = {
 	.reg_id = "SW1",
 	.clk1_id = "cpu_clk",
@@ -1257,7 +1335,7 @@ static void fec_gpio_iomux_deinit()
 			MX50_PAD_I2C3_SDA__GPIO_6_23;
 
 	/* Disable the Pull/keeper */
-	iomux_setting.pad_ctrl = 0x4;
+	iomux_setting.pad_ctrl = 0xE4;
 	mxc_iomux_v3_setup_pad(&iomux_setting);
 	gpio_request(FEC_EN, "fec-en");
 	gpio_direction_input(FEC_EN);
@@ -1267,9 +1345,20 @@ static void fec_gpio_iomux_deinit()
 
 static void mx50_suspend_enter()
 {
+	struct pad_desc *p = suspend_enter_pads;
+	int i;
+	/* Set PADCTRL to 0 for all IOMUX. */
+	for (i = 0; i < ARRAY_SIZE(suspend_enter_pads); i++) {
+		suspend_exit_pads[i] = *p;
+		p->pad_ctrl = 0;
+		p++;
+	}
+	mxc_iomux_v3_get_multiple_pads(suspend_exit_pads,
+			ARRAY_SIZE(suspend_exit_pads));
 	mxc_iomux_v3_setup_multiple_pads(
 			suspend_enter_pads,
 			ARRAY_SIZE(suspend_enter_pads));
+
 	fec_gpio_iomux_deinit();
 }
 
@@ -1310,6 +1399,17 @@ static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
 static void __init mx50_rdp_io_init(void)
 {
 	struct pad_desc cspi_keeper = MX50_PAD_ECSPI1_SCLK__GPIO_4_12;
+	struct pad_desc *p = mx50_rdp;
+	int i;
+
+	/* Set PADCTRL to 0 for all IOMUX. */
+	for (i = 0; i < ARRAY_SIZE(mx50_rdp); i++) {
+		int pad_ctl = p->pad_ctrl;
+		p->pad_ctrl = 0;
+		mxc_iomux_v3_setup_pad(p);
+		p->pad_ctrl = pad_ctl;
+		p++;
+	}
 
 	mxc_iomux_v3_setup_multiple_pads(mx50_rdp, \
 			ARRAY_SIZE(mx50_rdp));
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/plat-mxc/include/mach/iomux-mx50.h
index 2acac7ccace7..fd4a2e2f4ecc 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx50.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -47,7 +47,7 @@ typedef enum iomux_config {
 
 #define MX50_WVGA_PAD_CTRL	(PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
 
-#define MX50_SD_PAD_CTRL		(PAD_CTL_DSE_HIGH | \
+#define MX50_SD_PAD_CTRL		(PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \
 					PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST)
 
 #define MX50_SD3_PAD_DAT	(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
@@ -86,6 +86,7 @@ typedef enum iomux_config {
 #define MX50_PAD_I2C3_SCL__GPIO_6_22	IOMUX_PAD(0x2FC, 0x50, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_I2C3_SDA__GPIO_6_23	IOMUX_PAD(0x300, 0x54, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_PWM1__PWMO		IOMUX_PAD(0x304, 0x58, 0, 0x0, 0, NO_PAD_CTRL)
+#define MX50_PAD_PWM1__GPIO_6_24	IOMUX_PAD(0x304, 0x58, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_PWM2__GPIO_6_25	IOMUX_PAD(0x308, 0x5C, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_OWIRE__GPIO_6_26	IOMUX_PAD(0x30C, 0x60, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_EPITO__GPIO_6_27	IOMUX_PAD(0x310, 0x64, 1, 0x0, 0, NO_PAD_CTRL)
@@ -118,11 +119,11 @@ typedef enum iomux_config {
 
 /* HP detect */
 #define MX50_PAD_ECSPI1_SS0__GPIO_4_15	IOMUX_PAD(0x37C, 0xD0, 1, 0x0, 0, \
-							PAD_CTL_PUS_100K_UP)
+							PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
 #define MX50_PAD_ECSPI2_SCLK__GPIO_4_16	IOMUX_PAD(0x380, 0xD4, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_ECSPI2_MOSI__GPIO_4_17	IOMUX_PAD(0x384, 0xD8, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_ECSPI2_MISO__GPIO_4_18	IOMUX_PAD(0x388, 0xDC, 1, 0x0, 0, \
-							PAD_CTL_PUS_100K_UP)
+							PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
 #define MX50_PAD_ECSPI2_SS0__GPIO_4_19	IOMUX_PAD(0x38C, 0xE0, 1, 0x0, 0, MX50_SD_PAD_CTRL)
 #define MX50_PAD_SD1_CLK__GPIO_5_0	IOMUX_PAD(0x390, 0xE4, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_SD1_CMD__GPIO_5_1	IOMUX_PAD(0x394, 0xE8, 1, 0x0, 0, NO_PAD_CTRL)
@@ -223,7 +224,7 @@ typedef enum iomux_config {
 #define MX50_PAD_EPDC_SDCLKN__GPIO_3_25	IOMUX_PAD(0x5B0, 0x214, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_EPDC_SDSHR__GPIO_3_26	IOMUX_PAD(0x5B4, 0x218, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_EPDC_PWRCOM__GPIO_3_27	IOMUX_PAD(0x5B8, 0x21C, 1, 0x0, 0, NO_PAD_CTRL)
-#define MX50_PAD_EPDC_PWRSTAT__GPIO_3_28	IOMUX_PAD(0x5BC, 0x220, 1, 0x0, 0, NO_PAD_CTRL)
+#define MX50_PAD_EPDC_PWRSTAT__GPIO_3_28	IOMUX_PAD(0x5BC, 0x220, 1, 0x0, 0, PAD_CTL_PKE)
 #define MX50_PAD_EPDC_PWRCTRL0__GPIO_3_29	IOMUX_PAD(0x5C0, 0x224, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_EPDC_PWRCTRL1__GPIO_3_30	IOMUX_PAD(0x5C4, 0x228, 1, 0x0, 0, NO_PAD_CTRL)
 #define MX50_PAD_EPDC_PWRCTRL2__GPIO_3_31	IOMUX_PAD(0x5C8, 0x22C, 1, 0x0, 0, NO_PAD_CTRL)