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author | Richard Liu <r66033@freescale.com> | 2012-08-01 15:24:51 +0800 |
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committer | Richard Liu <r66033@freescale.com> | 2012-08-01 15:24:51 +0800 |
commit | a7fa8b16155254907d62ae3c0a6b3f3e6e893e8c (patch) | |
tree | 3cd341b8a7579bd5368a725125efde0bdcc6fc2c /arch | |
parent | 859da0d8d39b32c424721d0501e85587b3043970 (diff) |
ENGR00216855 suspend resume fail related with clock glitch
GPU 2D core suspend resume fail related with clock glitch
Switch GPU 2D core clock to PLL2
PLL3 has an errata TKT094231 To1.2 will fix it
Signed-off-by: Richard Liu <r66033@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-mx6/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index 34c26d4d3bc0..4d98b2680672 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -5377,7 +5377,7 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc, /* Need to keep PLL3_PFD_540M enabled until AXI is sourced from it. */ clk_enable(&axi_clk); - if (cpu_is_mx6q()) + if (cpu_is_mx6q() && (mx6q_revision() > IMX_CHIP_REVISION_1_1)) clk_set_parent(&gpu2d_core_clk[0], &pll3_usb_otg_main_clk); clk_set_parent(&ldb_di0_clk, &pll2_pfd_352M); |