diff options
| author | Robert Lee <robert.lee@freescale.com> | 2012-10-08 16:15:27 -0500 |
|---|---|---|
| committer | Ranjani Vaidyanathan <ra5478@freescale.com> | 2012-10-08 18:37:14 -0500 |
| commit | 75bd68f120834738e46c7859cc5ac5fb67a59d6e (patch) | |
| tree | f8dc18812b2ac734239157678a2d81973c831845 /arch | |
| parent | 13eafe65e999118236c1be42f233e41ab70d3e15 (diff) | |
ENGR00227422: ARM: imx6sl: Adjust ARM and SOC stby voltages
According to the latest specification data, these rails should
go no lower than 900mV in standby mode. This patch modifies
the existing mx6sl board files and sets the pmic standby voltage
for these rails to be 925mV (extra 25mV to account for pmic accuracy).
Signed-off-by: Robert Lee <robert.lee@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c index 134700a6d200..5cf34073bdc1 100644 --- a/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c +++ b/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c @@ -40,13 +40,13 @@ #define PFUZE100_I2C_ADDR (0x08) /*SWBST*/ #define PFUZE100_SW1ASTANDBY 33 -#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x16) +#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x19) /* 925mV */ #define PFUZE100_SW1ASTANDBY_STBY_M (0x3f<<0) #define PFUZE100_SW1BSTANDBY 40 -#define PFUZE100_SW1BSTANDBY_STBY_VAL (0x16) +#define PFUZE100_SW1BSTANDBY_STBY_VAL (0x19) /* 925mV */ #define PFUZE100_SW1BSTANDBY_STBY_M (0x3f<<0) #define PFUZE100_SW1CSTANDBY 47 -#define PFUZE100_SW1CSTANDBY_STBY_VAL (0x16) +#define PFUZE100_SW1CSTANDBY_STBY_VAL (0x19) /* 925mV */ #define PFUZE100_SW1CSTANDBY_STBY_M (0x3f<<0) #define PFUZE100_SW2STANDBY 54 #define PFUZE100_SW2STANDBY_STBY_VAL 0x0 diff --git a/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c index 875f08b07545..981d149d7aee 100644 --- a/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c +++ b/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c @@ -40,13 +40,13 @@ #define PFUZE100_I2C_ADDR (0x08) /*SWBST*/ #define PFUZE100_SW1ASTANDBY 33 -#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x16) +#define PFUZE100_SW1ASTANDBY_STBY_VAL (0x19) /* 925mv */ #define PFUZE100_SW1ASTANDBY_STBY_M (0x3f<<0) #define PFUZE100_SW1BSTANDBY 40 -#define PFUZE100_SW1BSTANDBY_STBY_VAL (0x16) +#define PFUZE100_SW1BSTANDBY_STBY_VAL (0x19) /* 925mv */ #define PFUZE100_SW1BSTANDBY_STBY_M (0x3f<<0) #define PFUZE100_SW1CSTANDBY 47 -#define PFUZE100_SW1CSTANDBY_STBY_VAL (0x16) +#define PFUZE100_SW1CSTANDBY_STBY_VAL (0x19) /* 925mv */ #define PFUZE100_SW1CSTANDBY_STBY_M (0x3f<<0) #define PFUZE100_SW2STANDBY 54 #define PFUZE100_SW2STANDBY_STBY_VAL 0x0 |