diff options
author | Zeng Zhaoming <b32542@freescale.com> | 2011-07-12 05:55:32 +0800 |
---|---|---|
committer | Zeng Zhaoming <b32542@freescale.com> | 2011-08-04 03:38:01 +0800 |
commit | c037ead48aeb3cbc54fb15d0039ba779eaa6fe65 (patch) | |
tree | 6ab207c18fa4c01cbe06a09672132571b9b7982c /arch | |
parent | 4ee70fcdbecda7dc5995aa080376e5448f6340d4 (diff) |
ENGR00144281 SDMA: System hangs in bootup when kernel_preempt not enable
When kernel_preempt not enable in configure, system bootup hangs
in sdma initialization.
This is caused by sdma initialization waiting for channel0 complete loading
script in queue, and arch_idle happens with action to disable some clocks,
if DDR clock disabled, script loading will failed and SoC hangs.
Solve it by make sure DDR clock is enabled during sdma initialization.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/plat-mxc/sdma/sdma.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/sdma/sdma.c b/arch/arm/plat-mxc/sdma/sdma.c index 7b3d7ae92eb8..04be666bf99a 100644 --- a/arch/arm/plat-mxc/sdma/sdma.c +++ b/arch/arm/plat-mxc/sdma/sdma.c @@ -1434,12 +1434,24 @@ int sdma_probe(struct platform_device *pdev) int irq; struct resource *rsrc; configs_data confreg_data; + char *ddr_clk_name = "emi_fast_clk"; + struct clk *mem_clock; + + if (cpu_is_mx50()) + ddr_clk_name = "ddr_clk"; /* Initialize to the default values */ confreg_data = iapi_ConfigDefaults; confreg_data.dspdma = 0; /* Set ACR bit */ + mem_clock = clk_get(&pdev->dev, ddr_clk_name); + if (!mem_clock) { + printk(KERN_ERR"can't get ddr memory clock\n"); + return -ENODEV; + } + + clk_enable(mem_clock); mxc_sdma_ahb_clk = clk_get(&pdev->dev, "sdma_ahb_clk"); mxc_sdma_ipg_clk = clk_get(&pdev->dev, "sdma_ipg_clk"); clk_enable(mxc_sdma_ahb_clk); @@ -1499,12 +1511,14 @@ int sdma_probe(struct platform_device *pdev) clk_disable(mxc_sdma_ahb_clk); clk_disable(mxc_sdma_ipg_clk); + clk_disable(mem_clock); return res; sdma_init_fail: printk(KERN_ERR "Error 0x%x in sdma_init\n", res); clk_disable(mxc_sdma_ahb_clk); clk_disable(mxc_sdma_ipg_clk); + clk_disable(mem_clock); return res; } |