diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-05-17 22:11:55 -0700 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-07-23 10:24:20 -0700 |
| commit | e67927dd092fec85d4026f1e19b42b47266b4208 (patch) | |
| tree | e1851d5dadc07f32291a14355d115ee767585f74 /arch | |
| parent | 147bf262ca48438ec8dca6dcbeff3f1cc456a82c (diff) | |
ARM: tegra: power: Enforce CPU rate range in secondary boot
On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by secondary cpu boot directly from LP mode.
Bug 988544
Change-Id: I0d86fbf0727a6bbf6069159e7c532947a9d0af73
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115930
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Greg Lo <glo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/platsmp.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index d1178a820f39..d36b18934acd 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -32,6 +32,7 @@ #include "clock.h" #include "reset.h" #include "sleep.h" +#include "cpu-tegra.h" bool tegra_all_cpus_booted; @@ -209,8 +210,16 @@ int boot_secondary(unsigned int cpu, struct task_struct *idle) /* Early boot, clock infrastructure is not initialized - CPU mode switch is not allowed */ status = -EINVAL; - } else + } else { +#ifdef CONFIG_CPU_FREQ + /* set cpu rate is within g-mode range before switch */ + unsigned int speed = max( + (unsigned long)tegra_getspeed(0), + clk_get_min_rate(cpu_g_clk) / 1000); + tegra_update_cpu_speed(speed); +#endif status = clk_set_parent(cpu_clk, cpu_g_clk); + } if (status) goto done; |