diff options
author | Roger Hsieh <rhsieh@nvidia.com> | 2011-07-11 14:42:40 +0800 |
---|---|---|
committer | Niket Sirsi <nsirsi@nvidia.com> | 2011-07-26 15:40:19 -0700 |
commit | eb7639ad28dae74d982b29f6caa7c98ec0baa501 (patch) | |
tree | 3d68b197a886e54f5cb75f161c85e732daf8a84a /arch | |
parent | 453bc4499adaeaa78dcd3f2870c9315e2abc4d15 (diff) |
arm: tegra: correct 3D power gate WAR.
3D power gate should be always disabled to keep the power. Set T20
enabled by default.
Bug 843271
Change-Id: Icf464cd107e65636440f8103ac6b104e2939e8b9
Reviewed-on: http://git-master/r/40342
Reviewed-on: http://git-master/r/43175
Reviewed-by: David Schalig <dschalig@nvidia.com>
Tested-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'arch')
-rwxr-xr-x[-rw-r--r--] | arch/arm/mach-tegra/Kconfig | 8 | ||||
-rwxr-xr-x[-rw-r--r--] | arch/arm/mach-tegra/common.c | 2 |
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 1e11fa6c7855..635c0b00afb4 100644..100755 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -14,6 +14,7 @@ config ARCH_TEGRA_2x_SOC select USB_ARCH_HAS_EHCI if USB_SUPPORT select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT + select DISABLE_3D_POWERGATING help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -151,3 +152,10 @@ config TEGRA_STAT_MON config USB_HOTPLUG bool "Enable USB hotplug" default n + +config DISABLE_3D_POWERGATING + bool "Disable 3D power gate" + depends on ARCH_TEGRA_2x_SOC + help + This is for silicon errata of 3D power gating. By setting this + config, 3D power will never be gated. diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 4091b6de2bcc..b3cf6feb1fca 100644..100755 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -162,7 +162,9 @@ void __init tegra_init_cache(void) static void __init tegra_init_power(void) { tegra_powergate_power_off(TEGRA_POWERGATE_MPE); +#if !CONFIG_DISABLE_3D_POWERGATING tegra_powergate_power_off(TEGRA_POWERGATE_3D); +#endif tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); } |