diff options
author | Richard Zhu <hongxing.zhu@nxp.com> | 2020-04-29 22:36:55 +0800 |
---|---|---|
committer | Richard Zhu <hongxing.zhu@nxp.com> | 2020-04-30 09:39:49 +0800 |
commit | 20a5e74485abe60c61f555e7ce8e561b8f3f176b (patch) | |
tree | bcd0ff2cd21906018d378e5742a510623c981093 /arch | |
parent | aa5d66d3571e82e401d6578993bbd315dbb680a3 (diff) |
MLK-23880 arm64: dts: imx8dx: refine the pcieb clocks
- Refine the PCIe clocks for iMX8DX and iMX8QXP.
- Correct the HSIO power domain name on iMX8QXP, otherwise, the
peripheral clocks wouldn't be enabled.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit a2c09691aeafc818c287f25d69e53b6411d4ef26)
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi index 5c377c2ce64d..72040461e67a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi @@ -1108,7 +1108,7 @@ }; }; - pd_hsio: hsio-power-domain { + pd_hsio: PD_HSIO { compatible = "nxp,imx8-pd"; reg = <SC_R_NONE>; #power-domain-cells = <0>; @@ -3442,8 +3442,11 @@ <&clk IMX8QXP_HSIO_PCIE_SLV_AXI_CLK>, <&clk IMX8QXP_HSIO_PHY_X1_PCLK>, <&clk IMX8QXP_HSIO_PCIE_X1_PER_CLK>, - <&clk IMX8QXP_HSIO_PCIE_DBI_AXI_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi"; + <&clk IMX8QXP_HSIO_PCIE_DBI_AXI_CLK>, + <&clk IMX8QXP_HSIO_PHY_X1_PER_CLK>, + <&clk IMX8QXP_HSIO_MISC_PER_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", + "pcie_inbound_axi", "phy_per", "misc_per"; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 105 4>, |