diff options
| author | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2020-06-26 17:45:56 +0300 |
|---|---|---|
| committer | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2020-07-06 20:32:26 +0300 |
| commit | a8363cd02eec2c04e464136e34ee2feca8b04b88 (patch) | |
| tree | 79f3c37f64c61eda3721911cba6e69f2f798c168 /arch | |
| parent | d6e1cff14875d6ce338c1f27afe0639ef0f97b79 (diff) | |
ARM64: dts: apalis-imx8qm: sync pcie clocks with NXP branch imx_4.14.98_2.3.0
NXP fixes a lot of issues in PCIe subsystem, in particular, add new
clocks. Synchronize the set of clocks for Apalis-iMX8QM SoM.
Related-to: ELB-1306
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi | 15 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi | 8 |
2 files changed, 20 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi index 222a33d0084f..dd28b02af711 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi @@ -1288,9 +1288,14 @@ clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>, <&pcie_sata_refclk_gate>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", + "pcie_inbound_axi", "phy_per", "misc_per", "pcie_ext"; + ext_osc = <1>; fsl,max-link-speed = <1>; reset-gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; @@ -1304,10 +1309,16 @@ clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, + <&clk IMX8QM_HSIO_PCIE_X1_PER_CLK>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>, <&pcie_wifi_refclk_gate>; /*clkreq-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;*/ - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pciex2_per", + "pcie_inbound_axi", "phy_per", "misc_per", "pcie_ext"; + epdev_on-supply = <®_module_wifi>; ext_osc = <1>; fsl,max-link-speed = <1>; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi index 01e2dbf4537d..4d4caebee232 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dtsi @@ -324,8 +324,14 @@ clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, + <&clk IMX8QM_HSIO_PCIE_X1_PER_CLK>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>, + <&clk IMX8QM_HSIO_PHY_X2_PER_CLK>, + <&clk IMX8QM_HSIO_MISC_PER_CLK>, <&pcie_sata_refclk_gate>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pciex2_per", + "pcie_inbound_axi", "phy_per", "misc_per", "pcie_ext"; }; /* Apalis MMC1 */ @@ -344,4 +350,4 @@ * issues with certain SD cards, disable 1.8V signaling for now. */ no-1-8-v; -};
\ No newline at end of file +}; |