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authorBoris Brezillon <boris.brezillon@free-electrons.com>2015-08-18 10:08:52 +0200
committerGregory CLEMENT <gregory.clement@free-electrons.com>2015-09-29 15:45:43 +0200
commitb2ee6b7bd597f567dc40447bb2ca473604ce3b6a (patch)
tree81e3446a2fc9a1124dd788731ce8644f38a3bdda /arch
parent97dd823e7e88d6c5a1aaf6dae5ecf5d0c43850ca (diff)
ARM: mvebu: add crypto related nodes to armada-xp.dtsi
Add crypto related nodes to armada-xp.dtsi. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 1c64ac34254b..be23196829bb 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -241,6 +241,18 @@
compatible = "marvell,armada-xp-neta";
};
+ crypto@90000 {
+ compatible = "marvell,armada-xp-crypto";
+ reg = <0x90000 0x10000>;
+ reg-names = "regs";
+ interrupts = <48>, <49>;
+ clocks = <&gateclk 23>, <&gateclk 23>;
+ clock-names = "cesa0", "cesa1";
+ marvell,crypto-srams = <&crypto_sram0>,
+ <&crypto_sram1>;
+ marvell,crypto-sram-size = <0x800>;
+ };
+
xor@f0900 {
compatible = "marvell,orion-xor";
reg = <0xF0900 0x100
@@ -261,6 +273,24 @@
};
};
};
+
+ crypto_sram0: sa-sram0 {
+ compatible = "mmio-sram";
+ reg = <MBUS_ID(0x09, 0x09) 0 0x800>;
+ clocks = <&gateclk 23>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 MBUS_ID(0x09, 0x09) 0 0x800>;
+ };
+
+ crypto_sram1: sa-sram1 {
+ compatible = "mmio-sram";
+ reg = <MBUS_ID(0x09, 0x05) 0 0x800>;
+ clocks = <&gateclk 23>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>;
+ };
};
clocks {