diff options
| author | Prashant Malani <pmalani@nvidia.com> | 2013-04-12 17:51:08 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:08:09 -0700 |
| commit | f188ccb54717b31d6e8b764b86fcc79a0d91f7cf (patch) | |
| tree | 23cc284ec3336ccfc926a0ceeeb7c5dd3ba79797 /arch | |
| parent | 609666d2d8c285b28528b8a2dcb446ff989ddd44 (diff) | |
ARM: tegra14: pm: Clear BB_MEM_REQ wake status
Despite clearing BB_MEM_REQ wake mask, it is
necessary to clear the corresponding bit from
wake status register to ensure that the
interrupt is cleared.
Bug 1257433
Change-Id: I31d296e898bc382da2986f3117f6cff5b8a8b2ca
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/219160
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/pm.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 155093c91bc4..ca2a5c032f7d 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -999,6 +999,9 @@ static void tegra_disable_lp1bb_interrupt(void) reg &= ~(PMC_WAKE2_BB_MEM_REQ); pmc_32kwritel(reg, PMC_WAKE2_MASK); + reg = PMC_WAKE2_BB_MEM_REQ; + pmc_32kwritel(reg, PMC_WAKE2_STATUS); + /* Set up the LIC to NOT accept pmc_wake events as interrupts */ reg = TRI_ICTLR_PMC_WAKE_INT; writel(reg, tert_ictlr + TRI_ICTLR_CPU_IER_CLR); |