arm: tegra: new dvfs update for aging factor

Following support added
DVFS for Gauranteed freq considering aging
CPU freq limit at higher temperature
EDP max current limits for each SKU

Bug 200195229

Change-Id: If00f3fd6b891cf366047dda331bd7ab1c15b40f7
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1146577
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>

3 files changed, 116 insertions, 95 deletions

diff --git a/arch/arm/mach-tegra/board-ardbeg-power.c b/arch/arm/mach-tegra/board-ardbeg-power.c
index a11cd6db4eed..f8ee3e6d14d8 100644
--- a/arch/arm/mach-tegra/board-ardbeg-power.c
+++ b/arch/arm/mach-tegra/board-ardbeg-power.c
@@ -391,9 +391,20 @@ int __init ardbeg_edp_init(void)
 			regulator_mA = 16800;
 		else if (pmu_board_info.board_id == BOARD_PM374)
 			regulator_mA = 32000;
-		else if (pmu_board_info.board_id == BOARD_PM375)
-			regulator_mA = 11000;
-		else
+		else if (pmu_board_info.board_id == BOARD_PM375) {
+			/* CD575M UCM2 */
+			if(tegra_cpu_speedo_id() == 6)
+				regulator_mA = 11800;
+			/* CD575MI UCM1 */
+			else if (tegra_cpu_speedo_id() == 8)
+				regulator_mA = 12450;
+			/* CD575MI UCM2 */
+			else if (tegra_cpu_speedo_id() == 7)
+				regulator_mA = 11500;
+			/* CD575M UCM1 default */
+			else
+				regulator_mA = 12500;
+		} else
 			regulator_mA = 14000;
 	}
 
diff --git a/arch/arm/mach-tegra/edp.c b/arch/arm/mach-tegra/edp.c
index 181947b85bad..75685443eb28 100644
--- a/arch/arm/mach-tegra/edp.c
+++ b/arch/arm/mach-tegra/edp.c
@@ -389,7 +389,7 @@ static int init_cpu_edp_limits_calculated(void)
 	unsigned int cpu_g_minf, cpu_g_maxf;
 	unsigned int cpu_iddq_ma;
 	unsigned int cpu_speedo_idx;
-	unsigned int cap, limit;
+	unsigned int cap, limit = -EINVAL;
 	struct tegra_edp_limits *cpu_edp_calculated_limits;
 	struct tegra_edp_limits *reg_idle_calc_limits;
 	struct tegra_system_edp_entry *power_edp_calc_limits;
@@ -469,10 +469,20 @@ static int init_cpu_edp_limits_calculated(void)
 		     temp_idx < ARRAY_SIZE(temperatures); temp_idx++) {
 			cpu_edp_calculated_limits[temp_idx].temperature =
 				temperatures[temp_idx];
-			if (temperatures[temp_idx] >= 76 &&
-					tegra_cpu_speedo_id() == 8)
-				limit = 1836000;
-			else
+			if (temperatures[temp_idx] >= 76) {
+					/* CD575M UCM2 */
+					if (tegra_cpu_speedo_id() == 6)
+						limit = 1836000;
+					/* CD575MI UCM2 */
+					else if (tegra_cpu_speedo_id() == 7)
+						limit = 1810500;
+					/* CD575MI UCM1 */
+					else if (tegra_cpu_speedo_id() == 8)
+						limit = 1887000;
+					/* CD575M UCM1 default */
+					else if (tegra_cpu_speedo_id() == -1)
+						limit = 1887000;
+			} else
 				limit = cpu_edp_calculate_maxf(params,
 						   temperatures[temp_idx],
 						   -1,
diff --git a/arch/arm/mach-tegra/tegra12_dvfs.c b/arch/arm/mach-tegra/tegra12_dvfs.c
index 8e4e8e8fc318..08bcbc806e27 100644..100755
--- a/arch/arm/mach-tegra/tegra12_dvfs.c
+++ b/arch/arm/mach-tegra/tegra12_dvfs.c
@@ -165,7 +165,7 @@ void __init tegra12x_vdd_cpu_align(int step_uv, int offset_uv)
 /* CPU DVFS tables */
 static unsigned long cpu_max_freq[] = {
 /* speedo_id	0	 1	  2	   3	    4	     5	      6		7	 8*/
-		2014500, 2320500, 2116500, 2524500, 1811000, 2218500, 1912500, 1912500, 2116500,
+		2014500, 2320500, 2116500, 2524500, 1811000, 2218500, 1989000, 1912500, 2116500,
 };
 
 static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
@@ -201,7 +201,7 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
 		 */
 		.clk_switch_trips = {34,}
 	},
-	/* Entry for Embedded SKU CD575M Always On*/
+	/* Entry for Embedded SKU CD575M Always On UCM2*/
 	{
 		.speedo_id = 6,
 		.process_id = -1,
@@ -213,36 +213,37 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
 			.tune_high_min_millivolts = 900,
 			.min_millivolts = 720,
 		},
-		.max_mv = 1120,
+		.max_mv = 1180,
 		.freqs_mult = KHZ,
 		.speedo_scale = 100,
 		.voltage_scale = 1000,
 		.cvb_table = {
 			/*f       dfll: c0,     c1,   c2  pll:  c0,   c1,    c2 */
-			{204000,        {1112619, -29295, 402}, {950000, 0, 0}},
-			{306000,	{1150460, -30585, 402}, {950000, 0, 0}},
-			{408000,	{1190122, -31865, 402}, {950000, 0, 0}},
-			{510000,	{1231606, -33155, 402}, {950000, 0, 0}},
-			{612000,	{1274912, -34435, 402}, {950000, 0, 0}},
-			{714000,	{1320040, -35725, 402}, {950000, 0, 0}},
-			{816000,	{1366990, -37005, 402}, {950000, 0, 0}},
-			{918000,	{1415762, -38295, 402}, {950000, 0, 0}},
-			{1020000,	{1466355, -39575, 402}, {950000, 0, 0}},
-			{1122000,	{1518771, -40865, 402}, {950000, 0, 0}},
-			{1224000,	{1573009, -42145, 402}, {970000, 0, 0}},
-			{1326000,	{1629068, -43435, 402}, {1100000, 0, 0}},
-			{1428000,	{1686950, -44715, 402}, {1100000, 0, 0}},
-			{1530000,	{1746653, -46005, 402}, {1100000, 0, 0}},
-			{1632000,	{1808179, -47285, 402}, {1200000, 0, 0}},
-			{1734000,	{1871526, -48575, 402}, {1200000, 0, 0}},
-			{1836000,	{1936696, -49855, 402}, {1200000, 0, 0}},
-			{1912500,	{2003687, -51145, 402}, {1200000, 0, 0}},
+			{204000,        {1113291, -20695, 062}, {950000, 0, 0}},
+			{306000,	{1143241, -21235, 062}, {950000, 0, 0}},
+			{408000,	{1174098, -21775, 062}, {950000, 0, 0}},
+			{510000,	{1205862, -22325, 062}, {950000, 0, 0}},
+			{612000,	{1238535, -22865, 062}, {950000, 0, 0}},
+			{714000,	{1272115, -23405, 062}, {950000, 0, 0}},
+			{816000,	{1306603, -23945, 062}, {950000, 0, 0}},
+			{918000,	{1341998, -24485, 062}, {950000, 0, 0}},
+			{1020000,	{1378301, -25025, 062}, {950000, 0, 0}},
+			{1122000,	{1415512, -25575, 062}, {950000, 0, 0}},
+			{1224000,	{1453631, -26115, 062}, {970000, 0, 0}},
+			{1326000,	{1492657, -26655, 062}, {1100000, 0, 0}},
+			{1428000,	{1532591, -27195, 062}, {1100000, 0, 0}},
+			{1530000,	{1573433, -27735, 062}, {1100000, 0, 0}},
+			{1632000,	{1615182, -28285, 062}, {1100000, 0, 0}},
+			{1734000,	{1657839, -28825, 062}, {1100000, 0, 0}},
+			{1836000,	{1701404, -29365, 062}, {1100000, 0, 0}},
+			{1861500,	{1711220, -29495, 062}, {1180000, 0, 0}},
+			{1912500,	{2244137, -64355, 613}, {1180000, 0, 0}},
 			{      0 , 	{      0,      0,   0}, {}},
 		},
 		.vmin_trips_table = { 20, 35, 55, 75, 120 },
 		.therm_floors_table = { 900, 800, 790, 770, 750, },
 	},
-	/* Entry for Embedded SKU CD575MI Always On*/
+	/* Entry for Embedded SKU CD575MI Always On UCM2*/
 	{
 		.speedo_id = 7,
 		.process_id = -1,
@@ -254,30 +255,30 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
 			.tune_high_min_millivolts = 950,
 			.min_millivolts = 950,
 		},
-		.max_mv = 1100,
+		.max_mv = 1150,
 		.freqs_mult = KHZ,
 		.speedo_scale = 100,
 		.voltage_scale = 1000,
 		.cvb_table = {
 			/*f       dfll: c0,     c1,   c2  pll:  c0,   c1,    c2 */
-			{204000,        {1112619, -29295, 402}, {950000, 0, 0}},
-			{306000,	{1150460, -30585, 402}, {950000, 0, 0}},
-			{408000,	{1190122, -31865, 402}, {950000, 0, 0}},
-			{510000,	{1231606, -33155, 402}, {950000, 0, 0}},
-			{612000,	{1274912, -34435, 402}, {950000, 0, 0}},
-			{714000,	{1320040, -35725, 402}, {950000, 0, 0}},
-			{816000,	{1366990, -37005, 402}, {950000, 0, 0}},
-			{918000,	{1415762, -38295, 402}, {950000, 0, 0}},
-			{1020000,	{1466355, -39575, 402}, {950000, 0, 0}},
-			{1122000,	{1518771, -40865, 402}, {950000, 0, 0}},
-			{1224000,	{1573009, -42145, 402}, {970000, 0, 0}},
-			{1326000,	{1629068, -43435, 402}, {1100000, 0, 0}},
-			{1428000,	{1686950, -44715, 402}, {1100000, 0, 0}},
-			{1530000,	{1746653, -46005, 402}, {1100000, 0, 0}},
-			{1632000,	{1808179, -47285, 402}, {1200000, 0, 0}},
-			{1734000,	{1871526, -48575, 402}, {1200000, 0, 0}},
-			{1836000,	{1936696, -49855, 402}, {1200000, 0, 0}},
-			{1912500,	{2003687, -51145, 402}, {1200000, 0, 0}},
+			{204000,        {1113291, -20695, 062}, {950000, 0, 0}},
+			{306000,	{1143241, -21235, 062}, {950000, 0, 0}},
+			{408000,	{1174098, -21775, 062}, {950000, 0, 0}},
+			{510000,	{1205862, -22325, 062}, {950000, 0, 0}},
+			{612000,	{1238535, -22865, 062}, {950000, 0, 0}},
+			{714000,	{1272115, -23405, 062}, {950000, 0, 0}},
+			{816000,	{1306603, -23945, 062}, {950000, 0, 0}},
+			{918000,	{1341998, -24485, 062}, {950000, 0, 0}},
+			{1020000,	{1378301, -25025, 062}, {950000, 0, 0}},
+			{1122000,	{1415512, -25575, 062}, {950000, 0, 0}},
+			{1224000,	{1453631, -26115, 062}, {970000, 0, 0}},
+			{1326000,	{1492657, -26655, 062}, {1100000, 0, 0}},
+			{1428000,	{1532591, -27195, 062}, {1100000, 0, 0}},
+			{1530000,	{1573433, -27735, 062}, {1100000, 0, 0}},
+			{1632000,	{1615182, -28285, 062}, {1100000, 0, 0}},
+			{1734000,	{1657839, -28825, 062}, {1100000, 0, 0}},
+			{1810500,	{1690214, -29225, 062}, {1150000, 0, 0}},
+			{1912500,	{2244137, -64355, 613}, {1150000, 0, 0}},
 			{      0 , 	{      0,      0,   0}, {}},
 		},
 		/*
@@ -286,7 +287,7 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
 		 */
 		.clk_switch_trips = {0,}
 	},
-	/* Entry for Embedded SKU CD575MI */
+	/* Entry for Embedded SKU CD575MI UCM1*/
 	{
 		.speedo_id = 8,
 		.process_id = -1,
@@ -304,26 +305,27 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
 		.voltage_scale = 1000,
 		.cvb_table = {
 			/*f       dfll: c0,     c1,   c2  pll:  c0,   c1,    c2 */
-			{204000,        {1112619, -29295, 402}, {950000, 0, 0}},
-			{306000,	{1150460, -30585, 402}, {950000, 0, 0}},
-			{408000,	{1190122, -31865, 402}, {950000, 0, 0}},
-			{510000,	{1231606, -33155, 402}, {950000, 0, 0}},
-			{612000,	{1274912, -34435, 402}, {950000, 0, 0}},
-			{714000,	{1320040, -35725, 402}, {950000, 0, 0}},
-			{816000,	{1366990, -37005, 402}, {950000, 0, 0}},
-			{918000,	{1415762, -38295, 402}, {950000, 0, 0}},
-			{1020000,	{1466355, -39575, 402}, {950000, 0, 0}},
-			{1122000,	{1518771, -40865, 402}, {950000, 0, 0}},
-			{1224000,	{1573009, -42145, 402}, {970000, 0, 0}},
-			{1326000,	{1629068, -43435, 402}, {1100000, 0, 0}},
-			{1428000,	{1686950, -44715, 402}, {1100000, 0, 0}},
-			{1530000,	{1746653, -46005, 402}, {1100000, 0, 0}},
-			{1632000,	{1808179, -47285, 402}, {1130000, 0, 0}},
-			{1734000,	{1871526, -48575, 402}, {1130000, 0, 0}},
-			{1836000,	{1936696, -49855, 402}, {1210000, 0, 0}},
-			{1938000,	{2003687, -51145, 402}, {1300000, 0, 0}},
-			{2014500,	{2054787, -52095, 402}, {1300000, 0, 0}},
-			{2116500,	{2124957, -53385, 402}, {1300000, 0, 0}},
+			{204000,        {1113291, -20695, 062}, {950000, 0, 0}},
+			{306000,	{1143241, -21235, 062}, {950000, 0, 0}},
+			{408000,	{1174098, -21775, 062}, {950000, 0, 0}},
+			{510000,	{1205862, -22325, 062}, {950000, 0, 0}},
+			{612000,	{1238535, -22865, 062}, {950000, 0, 0}},
+			{714000,	{1272115, -23405, 062}, {950000, 0, 0}},
+			{816000,	{1306603, -23945, 062}, {950000, 0, 0}},
+			{918000,	{1341998, -24485, 062}, {950000, 0, 0}},
+			{1020000,	{1378301, -25025, 062}, {950000, 0, 0}},
+			{1122000,	{1415512, -25575, 062}, {950000, 0, 0}},
+			{1224000,	{1453631, -26115, 062}, {970000, 0, 0}},
+			{1326000,	{1492657, -26655, 062}, {1100000, 0, 0}},
+			{1428000,	{1532591, -27195, 062}, {1100000, 0, 0}},
+			{1530000,	{1573433, -27735, 062}, {1100000, 0, 0}},
+			{1632000,	{1615182, -28285, 062}, {1100000, 0, 0}},
+			{1734000,	{1657839, -28825, 062}, {1100000, 0, 0}},
+			{1836000,	{1701404, -29365, 062}, {1100000, 0, 0}},
+			{1861500,	{1711220, -29495, 062}, {1180000, 0, 0}},
+			{1887000,	{1723527, -29635, 062}, {1180000, 0, 0}},
+			{1938000,	{1745877, -29900, 062}, {1220000, 0, 0}},
+			{2014500,	{2342215, -66500, 613}, {1220000, 0, 0}},
 			{      0 , 	{      0,      0,   0}, {}},
 		},
 		/*
@@ -332,6 +334,7 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
 		 */
 		.clk_switch_trips = {0,}
 	},
+	/* Entry for Embedded SKU CD575M UCM1*/
 	{
 		.speedo_id = -1,
 		.process_id = -1,
@@ -348,31 +351,28 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
 		.speedo_scale = 100,
 		.voltage_scale = 1000,
 		.cvb_table = {
-			/*f       dfll: c0,     c1,   c2  pll:  c0,   c1,    c2 */
-			{204000,        {1112619, -29295, 402}, {800000, 0, 0}},
-			{306000,	{1150460, -30585, 402}, {800000, 0, 0}},
-			{408000,	{1190122, -31865, 402}, {800000, 0, 0}},
-			{510000,	{1231606, -33155, 402}, {800000, 0, 0}},
-			{612000,	{1274912, -34435, 402}, {800000, 0, 0}},
-			{714000,	{1320040, -35725, 402}, {800000, 0, 0}},
-			{816000,	{1366990, -37005, 402}, {820000, 0, 0}},
-			{918000,	{1415762, -38295, 402}, {840000, 0, 0}},
-			{1020000,	{1466355, -39575, 402}, {880000, 0, 0}},
-			{1122000,	{1518771, -40865, 402}, {900000, 0, 0}},
-			{1224000,	{1573009, -42145, 402}, {930000, 0, 0}},
-			{1326000,	{1629068, -43435, 402}, {960000, 0, 0}},
-			{1428000,	{1686950, -44715, 402}, {990000, 0, 0}},
-			{1530000,	{1746653, -46005, 402}, {1020000, 0, 0}},
-			{1632000,	{1808179, -47285, 402}, {1070000, 0, 0}},
-			{1734000,	{1871526, -48575, 402}, {1100000, 0, 0}},
-			{1836000,	{1936696, -49855, 402}, {1140000, 0, 0}},
-			{1938000,	{2003687, -51145, 402}, {1180000, 0, 0}},
-			{2014500,	{2054787, -52095, 402}, {1220000, 0, 0}},
-			{2116500,	{2124957, -53385, 402}, {1260000, 0, 0}},
-			{2218500,	{2297880, -59325, 449}, {1310000, 0, 0} },
-			{2320500,	{2376237, -60755, 449}, {1360000, 0, 0} },
-			{2397000,	{2448994, -61835, 449}, {1400000, 0, 0} },
-			{2499000,	{2537299, -62735, 449}, {1400000, 0, 0} },
+			/*f       dfll:	 c0,        c1,   c2  pll: c0,  c1, c2 */
+			{204000,        {1113291, -20695, 062}, {950000, 0, 0}},
+			{306000,	{1143241, -21235, 062}, {950000, 0, 0}},
+			{408000,	{1174098, -21775, 062}, {950000, 0, 0}},
+			{510000,	{1205862, -22325, 062}, {950000, 0, 0}},
+			{612000,	{1238535, -22865, 062}, {950000, 0, 0}},
+			{714000,	{1272115, -23405, 062}, {950000, 0, 0}},
+			{816000,	{1306603, -23945, 062}, {950000, 0, 0}},
+			{918000,	{1341998, -24485, 062}, {950000, 0, 0}},
+			{1020000,	{1378301, -25025, 062}, {950000, 0, 0}},
+			{1122000,	{1415512, -25575, 062}, {950000, 0, 0}},
+			{1224000,	{1453631, -26115, 062}, {970000, 0, 0}},
+			{1326000,	{1492657, -26655, 062}, {1100000, 0, 0}},
+			{1428000,	{1532591, -27195, 062}, {1100000, 0, 0}},
+			{1530000,	{1573433, -27735, 062}, {1100000, 0, 0}},
+			{1632000,	{1615182, -28285, 062}, {1100000, 0, 0}},
+			{1734000,	{1657839, -28825, 062}, {1100000, 0, 0}},
+			{1836000,	{1701404, -29365, 062}, {1100000, 0, 0}},
+			{1887000,	{1723527, -29635, 062}, {1180000, 0, 0}},
+			{1938000,	{1745877, -29905, 062}, {1220000, 0, 0}},
+			{1963500,	{1768453, -30175, 062}, {1260000, 0, 0}},
+			{2065500,	{2392497, -67635, 613}, {1310000, 0, 0} },
 			{      0 , 	{      0,      0,   0}, {      0, 0, 0}},
 		},
 		.vmin_trips_table = { 20, 35, 55, 75, 120 },