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authorStefan Agner <stefan.agner@toradex.com>2015-08-05 16:37:45 +0200
committerStefan Agner <stefan.agner@toradex.com>2015-08-05 17:26:57 +0200
commite5a411c2f2e3b62a4b6c962b42a7f148e3eadec1 (patch)
tree18d2eb07185f0a16d47495ad92ea5422c8e369be /arch
parent1f394d29df018f1c7050d863698382a31cbbb7bc (diff)
ARM: dts: vf610: define audio clock as mclk1
Due to a bug in the clock tree the bus clock gate has been part of the audio clock, resulting in one clock which enabled the bus and audio clock (VF610_CLK_SAI0). Since this is fixed in the clock driver, we need to make sure that still both clocks get correctly assigned: - VF610_CLK_SAI0 is the bus clock only. - VF610_CLK_SAI0_DIV is the audio clock only.
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/vfxxx.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index b2ad38a687da..6f7dead1a6eb 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -179,7 +179,7 @@
reg = <0x4002f000 0x1000>;
interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_SAI0>,
- <&clks VF610_CLK_SAI0>,
+ <&clks VF610_CLK_SAI0_DIV>,
<&clks 0>, <&clks 0>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
@@ -193,7 +193,7 @@
reg = <0x40031000 0x1000>;
interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_SAI2>,
- <&clks VF610_CLK_SAI2>,
+ <&clks VF610_CLK_SAI2_DIV>,
<&clks 0>, <&clks 0>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";