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authorRobin Gong <b38343@freescale.com>2013-10-23 17:42:55 +0800
committerRichard Liu <r66033@freescale.com>2013-10-23 18:00:26 +0800
commitd3d6949649c522ae692287de2b12c744676076aa (patch)
tree1119e6c86796f975d1700114363ff5735179245a /arch
parent5be7e0e0b0f4f1039ecf07aeef7346fe2285e053 (diff)
ENGR00278452 PU: fix system hang if run Audio loop test
cpufreq and pu power management will oprate the same register, it looks should keep them operating in order not concurrent. Then use the cpufreq mutex in xPU driver to make sure. Another code bug is in pu power management which base regulator framework, we set the reister directly not regulator, then there is the chance set_volatage will miss the chance if this time voltage setting as the last time setting before PU disable, but we have to do this, so add regulator_sync_voltage to force sync the voltage setting. The drawback is setting twice... Note: This patch is temporary and supposed to be replaced it once we find the root cause. Signed-off-by: Robin Gong <b38343@freescale.com> Acked-by: Jason Liu
Diffstat (limited to 'arch')
-rwxr-xr-xarch/arm/plat-mxc/cpufreq.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index bf34bf79ceea..2d26971a01ed 100755
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -47,7 +47,7 @@ static u32 pre_suspend_rate;
int cpufreq_suspended;
#endif
static bool cpufreq_suspend;
-static struct mutex set_cpufreq_lock;
+struct mutex set_cpufreq_lock;
extern struct regulator *cpu_regulator;
extern struct regulator *soc_regulator;
@@ -108,6 +108,13 @@ int set_cpu_freq(int freq)
"COULD NOT SET PU VOLTAGE!!!!\n");
goto err2;
}
+ /*
+ * Force sync setting PU since regulator mabye maintain
+ * the old volatage setting before disable PU, then will
+ * miss this time setting if the two setting is same.
+ * So do force sync again here.
+ */
+ regulator_sync_voltage(pu_regulator);
}
ret = regulator_set_voltage(cpu_regulator, gp_volt,
gp_volt);
@@ -148,6 +155,13 @@ int set_cpu_freq(int freq)
"COULD NOT SET PU VOLTAGE!!!!\n");
goto err7;
}
+ /*
+ * Force sync setting PU since regulator mabye maintain
+ * the old volatage setting before disable PU, then will
+ * miss this time setting if the two setting is same.
+ * So do force sync again here.
+ */
+ regulator_sync_voltage(pu_regulator);
}
/* Check if the bus freq can be decreased.*/
bus_freq_update(cpu_clk, false);