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authorAlex Frid <afrid@nvidia.com>2010-08-24 13:36:07 -0700
committerYu-Huan Hsu <yhsu@nvidia.com>2010-09-17 20:33:18 -0700
commit98242b67666a43a1e42a634def39545bec6406ed (patch)
tree1f6e30f001e218d070d7646fb5b55f1f3e8afa27 /arch
parent7d29357618335175528c5907cdb86f8577a2c49d (diff)
[ARM/tegra] RM: Clean-up SPI hints/APB low corner.
- Completely removed busy hints for the SPI channel connected to PMU (busy hints were allowed for for CS, other than PMU, which may create dead-lock if channel access is serialized). - Increased APB low corner to 36MHz for reliable SPI communications at default low frequencies. Bug 721076 (cherry picked from commit 50ccc3cb8f0956370f1841e83133f47c88615889) Change-Id: I0a119610608bc5db4d7daea68bd9d4285d3715e8 Reviewed-on: http://git-master.nvidia.com/r/6744 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h2
-rw-r--r--arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c6
2 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
index 3ff0bdd4eb87..d211fdb61f41 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
+++ b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
@@ -146,7 +146,7 @@ extern "C"
*/
#define NVRM_DFS_PARAM_APB_AP20 \
NVRM_AP20_APB_MAX_KHZ, /* AP20 APB limit is lower than other buses */ \
- 24000, /* Minimum domain frequency 24 MHz */ \
+ 36000, /* Minimum domain frequency 36 MHz */ \
1000, /* Frequency change upper band 1 MHz */ \
1000, /* Frequency change lower band 1 MHz */ \
{ /* RT starvation control parameters */ \
diff --git a/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c b/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
index 26ee1e1a6457..ff8388ce822f 100644
--- a/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
+++ b/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
@@ -947,8 +947,7 @@ static void BoostFrequency(NvRmSpiHandle hRmSpiSlink, NvBool IsBoost, NvU32 Tran
{
if (TransactionSize > hRmSpiSlink->HwRegs.MaxWordTransfer)
{
- if (!((hRmSpiSlink->IsPmuInterface) &&
- (hRmSpiSlink->PmuChipSelectId == hRmSpiSlink->CurrTransferChipSelId)))
+ if (!(hRmSpiSlink->IsPmuInterface))
{
hRmSpiSlink->BusyHints[0].BoostKHz = 150000; // Emc
hRmSpiSlink->BusyHints[0].BoostDurationMs
@@ -973,8 +972,7 @@ static void BoostFrequency(NvRmSpiHandle hRmSpiSlink, NvBool IsBoost, NvU32 Tran
{
if (hRmSpiSlink->IsFreqBoosted)
{
- if (!((hRmSpiSlink->IsPmuInterface) &&
- (hRmSpiSlink->PmuChipSelectId == hRmSpiSlink->CurrTransferChipSelId)))
+ if (!(hRmSpiSlink->IsPmuInterface))
{
hRmSpiSlink->BusyHints[0].BoostKHz = 0; // Emc
hRmSpiSlink->BusyHints[1].BoostKHz = 0; // Ahb