summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorSylwester Nawrocki <s.nawrocki@samsung.com>2013-04-09 23:52:21 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-04-10 00:09:30 +0900
commit646dd2f0a980949b05042792fbadd72b735c3eda (patch)
tree372fb8673199a4157235ffbbf4d66e3f0a55b10e /arch
parentb530f742ac27460d41d35b638ad6aad92044a982 (diff)
ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller
The external pending interrupt register address (EINTPEND) offset is 0xa8, not 0x08. Without this patch the external interrupts are not properly acknowledged, which may lead to an interrupt storm and the system hang as soon as any external interrupt is requested. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c24xx/irq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index cb9f5e011e73..d8ba9bee4c7e 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np,
base = (void *)0xfd000000;
intc->reg_mask = base + 0xa4;
- intc->reg_pending = base + 0x08;
+ intc->reg_pending = base + 0xa8;
irq_num = 20;
irq_start = S3C2410_IRQ(32);
irq_offset = 4;