diff options
| author | Dara Ramesh <dramesh@nvidia.com> | 2010-05-11 12:04:10 +0530 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-05-11 15:15:11 -0700 |
| commit | dd9a3d8d141a4b1e09ecb4556804bb7ce5b9a650 (patch) | |
| tree | 7c9029dd7277b47d18ebb9fd43c249f2afe8c6e3 /arch | |
| parent | 4e8f661e2231c7cb5ee642d0511e59b6ea343e4d (diff) | |
tegra : Move AVPLC to 24 Mhz
Bug 656729
Power optimization - Optimize aac, mp3 and wma ulp use cases for restricitng AVP
activity within LC at 24 Mhz
Tested on E1108 board with audioplayback (AAC,MP3, WMA)
Power numbers are reduced by 2.3 mW and without effecting LP2 duty cycle (LP2@ 97%).
Change-Id: Ibb89e611994d4f9da752c2bfa15e50f9c08280a0
Reviewed-on: http://git-master/r/1351
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h index 19881cdddb60..97e6cd09310c 100644 --- a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h +++ b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h @@ -80,7 +80,7 @@ extern "C" */ #define NVRM_DFS_PARAM_AVP_AP20 \ NvRmFreqMaximum, /* Maximum domain frequency set to h/w limit */ \ - 36000, /* Minimum domain frequency 36 MHz */ \ + 24000, /* Minimum domain frequency 24 MHz */ \ 1000, /* Frequency change upper band 1 MHz */ \ 1000, /* Frequency change lower band 1 MHz */ \ { /* RT starvation control parameters */ \ |