diff options
author | Gary King <gking@nvidia.com> | 2010-02-10 19:00:48 -0800 |
---|---|---|
committer | Gary King <gking@nvidia.com> | 2010-02-10 20:23:53 -0800 |
commit | ab7fcb00afc6e6d23040e9f53932f38d34048f9b (patch) | |
tree | 4ce914bcdeb51fd546de0bdd4cbdde76e59b82a1 /arch | |
parent | 140c5a12fb023152eded54a9e9aebb850463e0db (diff) |
tegra board: update cache init to support PL3XO & L2XO configs
prepare the tegra initialization routine for an upcoming change to
the L2 cache code which will move from using CONFIG_CACHE_L2X0 to
CONFIG_CACHE_PL3X0 in order to improve performance
Change-Id: Icd2b6836682e5f76427b63f9b7785318e9547c07
Diffstat (limited to 'arch')
-rwxr-xr-x | arch/arm/mach-tegra/init_common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/init_common.c b/arch/arm/mach-tegra/init_common.c index b054a1bf40af..19bb822acb23 100755 --- a/arch/arm/mach-tegra/init_common.c +++ b/arch/arm/mach-tegra/init_common.c @@ -787,7 +787,7 @@ fail: } #endif -#if !defined(CONFIG_CACHE_L2X0) +#if !(defined(CONFIG_CACHE_PL3X0) || defined(CONFIG_CACHE_L2X0)) #define tegra_pl310_init() do {} while (0) #else #include <asm/hardware/cache-l2x0.h> |