diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2016-02-24 11:57:02 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2016-02-24 14:50:08 +0800 |
| commit | 7a11789d1330b54fd916e1db94616f2367d90828 (patch) | |
| tree | 3621a59b6786161e57facfb647003817ce80b7fe /arch | |
| parent | 54cf6a27e33647c9405b9ba1ae49bb96ceefaa63 (diff) | |
MLK-12443 ARM: imx: disable low power mode before entering LPSR mode
Before entering LPSR mode, as GPC was set to STOP/DSM mode already,
the wfi loop after LPSR mode would cause system enter STOP/DSM mode
first, then SNVS will force PMIC_ON_REQ to low, as SNVS needs IPG
clock to be on before entering SNVS/LPSR mode, so we have to disable
STOP/DSM mode to make sure IPG clock is on before SNVS actually enters
LPSR mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/suspend-imx7.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/suspend-imx7.S b/arch/arm/mach-imx/suspend-imx7.S index 086e0883e216..2b279795be53 100644 --- a/arch/arm/mach-imx/suspend-imx7.S +++ b/arch/arm/mach-imx/suspend-imx7.S @@ -555,6 +555,12 @@ ENTRY(imx7_suspend) cmp r7, #0x0 beq ddr_retention_enter_out + /* disable STOP mode before entering LPSR */ + ldr r11, [r0, #PM_INFO_MX7_GPC_V_OFFSET] + ldr r7, [r11] + bic r7, #0xf + str r7, [r11] + /* shut down vddsoc to enter lpsr mode */ ldr r11, [r0, #PM_INFO_MX7_SNVS_V_OFFSET] ldr r7, [r11, #0x38] |