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authorZhou Jingyu <b02241@freescale.com>2011-03-09 17:52:13 +0800
committerZhou Jingyu <b02241@freescale.com>2011-03-10 16:59:08 +0800
commite7101b7c3777d716fe91c20cad38f56133ab338d (patch)
treea0e41e7e2e918032bca5c2767c313d54b526e78b /arch
parent53d43f944d200f0490616c80a0de7896e45f5df7 (diff)
ENGR00139626 MX53: fix can not set to 160M when current CPU works at 1000M
Add correct pll parameters for 160M working point Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx5/mx53_wp.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/mx53_wp.c b/arch/arm/mach-mx5/mx53_wp.c
index f40a979aaf3d..342ba915560a 100644
--- a/arch/arm/mach-mx5/mx53_wp.c
+++ b/arch/arm/mach-mx5/mx53_wp.c
@@ -108,6 +108,10 @@ static struct cpu_wp cpu_wp_ces[] = {
{
.pll_rate = 800000000,
.cpu_rate = 160000000,
+ .pdf = 0,
+ .mfi = 8,
+ .mfd = 2,
+ .mfn = 1,
.cpu_podf = 4,
.cpu_voltage = 900000,},
};
@@ -149,6 +153,10 @@ static struct cpu_wp cpu_wp_ces_1_2g[] = {
{
.pll_rate = 800000000,
.cpu_rate = 160000000,
+ .pdf = 0,
+ .mfi = 8,
+ .mfd = 2,
+ .mfn = 1,
.cpu_podf = 4,
.cpu_voltage = 900000,},
};