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authorMichael Neuling <michael.neuling@au1.ibm.com>2013-04-24 00:30:09 +0000
committerBen Hutchings <ben@decadent.org.uk>2013-05-13 15:02:27 +0100
commit075d7822cf0b70d6e8e1d736ebc49f6df924d6cc (patch)
tree9191b550d88ae1606e33b54898ec0bd6fad9c54d /arch
parentded197648dfd25c4c9b1a1a7ab60d82256da82a2 (diff)
powerpc: Add isync to copy_and_flush
commit 29ce3c5073057991217916abc25628e906911757 upstream. In __after_prom_start we copy the kernel down to zero in two calls to copy_and_flush. After the first call (copy from 0 to copy_to_here:) we jump to the newly copied code soon after. Unfortunately there's no isync between the copy of this code and the jump to it. Hence it's possible that stale instructions could still be in the icache or pipeline before we branch to it. We've seen this on real machines and it's results in no console output after: calling quiesce... returning from prom_init The below adds an isync to ensure that the copy and flushing has completed before any branching to the new instructions occurs. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/head_64.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index cdf6b3fea9f2..2c4922795865 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -502,6 +502,7 @@ _GLOBAL(copy_and_flush)
sync
addi r5,r5,8
addi r6,r6,8
+ isync
blr
.align 8