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authorAnson Huang <b20788@freescale.com>2012-08-16 02:45:11 +0800
committerXinyu Chen <xinyu.chen@freescale.com>2012-08-22 10:26:34 +0800
commit0ee148e5511a049e61c0aca84d35ef3885faa168 (patch)
tree1fc3407c20950f28983b55fe17cd3e442d32f858 /arch
parent6dcf59be03029674381b1d3f6c2b632c24512f61 (diff)
ENGR00220388 [MX6]Adjust SOC/PU voltage according to datasheet
SOC/PU voltage need to following some rules according to latest datasheet: 1. SOC/PU CAP voltage must be 1.15V <= SOC/PU <= 1.3V; 2. SOC and PU must be same as they don't have level shift; 3. Adjust previous wrong voltage setting. If SOC/PU voltage is too low, may cause system crash on some chips, we have a board that easily crash with GPU working and doing some tar operation, with this voltage adjust, this issue fixed. Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx6/cpu_op-mx6.c89
1 files changed, 34 insertions, 55 deletions
diff --git a/arch/arm/mach-mx6/cpu_op-mx6.c b/arch/arm/mach-mx6/cpu_op-mx6.c
index 98181ceb3670..d0a7a42dfb85 100644
--- a/arch/arm/mach-mx6/cpu_op-mx6.c
+++ b/arch/arm/mach-mx6/cpu_op-mx6.c
@@ -36,22 +36,15 @@ static struct cpu_op mx6_cpu_op_1_2G[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1100000,},
-/* {
- .pll_rate = 996000000,
- .cpu_rate = 498000000,
- .cpu_podf = 1,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
- .cpu_voltage = 1050000,},*/
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 925000,},
};
@@ -68,22 +61,15 @@ static struct cpu_op mx6_cpu_op_1G[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1100000,},
-/* {
- .pll_rate = 996000000,
- .cpu_rate = 498000000,
- .cpu_podf = 1,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
- .cpu_voltage = 1050000,},*/
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 925000,},
};
@@ -92,22 +78,15 @@ static struct cpu_op mx6_cpu_op[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1100000,},
-/* {
- .pll_rate = 996000000,
- .cpu_rate = 498000000,
- .cpu_podf = 1,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
- .cpu_voltage = 1050000,},*/
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 925000,},
};
@@ -124,22 +103,22 @@ static struct cpu_op mx6dl_cpu_op_1_2G[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
- .cpu_voltage = 1125000,},
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
+ .cpu_voltage = 1100000,},
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1025000,},
{
.pll_rate = 396000000,
.cpu_rate = 198000000,
.cpu_podf = 1,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1025000,},
};
/* working point(wp): 0 - 1GHz; 1 - 800MHz, 2 - 400MHz, 3 - 200MHz */
@@ -155,22 +134,22 @@ static struct cpu_op mx6dl_cpu_op_1G[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
- .cpu_voltage = 1125000,},
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
+ .cpu_voltage = 1100000,},
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1025000,},
{
.pll_rate = 396000000,
.cpu_rate = 198000000,
.cpu_podf = 1,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1025000,},
};
static struct cpu_op mx6dl_cpu_op[] = {
@@ -178,23 +157,23 @@ static struct cpu_op mx6dl_cpu_op[] = {
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
.cpu_voltage = 1100000,},
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
- .cpu_voltage = 1000000,},
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
+ .cpu_voltage = 1025000,},
{
.pll_rate = 396000000,
.cpu_rate = 198000000,
.cpu_podf = 1,
- .pu_voltage = 1100000,
- .soc_voltage = 1100000,
- .cpu_voltage = 1000000,},
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
+ .cpu_voltage = 1025000,},
};
static struct dvfs_op dvfs_core_setpoint_1_2G[] = {