diff options
| author | Sonny Rao <sonnyrao@chromium.org> | 2014-11-18 23:15:19 -0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-11-28 00:37:47 +0100 |
| commit | 6d288b169bdfbed28d308b077af3d9196025cd8b (patch) | |
| tree | c0351514c50f102862cc3bfc1c3fc2b2d855b378 /drivers/clk/rockchip | |
| parent | a72da7c1666b4464f1610fb9e90ac64ca2ea7a44 (diff) | |
clk: rockchip: rk3288 export i2s0_clkout for use in DT
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
[removed CLK_SET_RATE_PARENT from original patch]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip')
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3288.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 232809725c55..a43045b05d98 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -308,7 +308,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { RK3288_CLKGATE_CON(4), 2, GFLAGS), MUX(0, "i2s_pre", mux_i2s_pre_p, CLK_SET_RATE_PARENT, RK3288_CLKSEL_CON(4), 8, 2, MFLAGS), - COMPOSITE_NODIV(0, "i2s0_clkout", mux_i2s_clkout_p, 0, + COMPOSITE_NODIV(SCLK_I2S0_OUT, "i2s0_clkout", mux_i2s_clkout_p, 0, RK3288_CLKSEL_CON(4), 12, 1, MFLAGS, RK3288_CLKGATE_CON(4), 0, GFLAGS), GATE(SCLK_I2S0, "sclk_i2s0", "i2s_pre", CLK_SET_RATE_PARENT, |