diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2016-11-18 22:01:33 +0800 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
| commit | a2f88faff97deced35cd2faba68e466264a0f281 (patch) | |
| tree | ac263c5d1341bc23d73a7e0d8828f8f225031a6d /drivers/clocksource | |
| parent | 1c0fc00271abcde80e01d67f1081f0510c1651b0 (diff) | |
MLK-13480-3 clocksource: imx-tpm: increase TPM clock frequency to 3MHz
As TPM default clock parent is changed to OSC which is 24MHz,
to keep its frequency as 3MHz, need to update its divider
from 16 to 8.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/timer-imx-tpm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clocksource/timer-imx-tpm.c b/drivers/clocksource/timer-imx-tpm.c index ffebed83bff7..608dca163ee9 100644 --- a/drivers/clocksource/timer-imx-tpm.c +++ b/drivers/clocksource/timer-imx-tpm.c @@ -168,14 +168,14 @@ static int __init tpm_timer_init(struct device_node *np) __raw_writel(0, timer_base + TPM_CNT); __raw_writel(0, timer_base + TPM_C0SC); - /* set the prescale div, div by 16 */ - __raw_writel(0xc, timer_base + TPM_SC); + /* set the prescale div, div by 8 = 3MHz */ + __raw_writel(0xb, timer_base + TPM_SC); /* set the MOD register to 0xffffffff for free running counter */ __raw_writel(0xffffffff, timer_base + TPM_MOD); - tpm_clocksource_init(clk_get_rate(clk) / 16); - tpm_clockevent_init(clk_get_rate(clk) / 16, irq); + tpm_clocksource_init(clk_get_rate(clk) / 8); + tpm_clockevent_init(clk_get_rate(clk) / 8, irq); val = __raw_readl(timer_base); |