diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2018-11-03 12:15:12 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:35:02 +0800 |
commit | 39fbb4d8a67cf4f8146127bd17c60f5eb6d37d41 (patch) | |
tree | 5ca49990e93264386e2b6f0c5ec5dd0da0636035 /drivers/cpufreq | |
parent | fd67888f2f6356c5f0657e112413e5cfc51590f7 (diff) |
MLK-20203-1 cpufreq: imx6q: fix coverity issue
This patch fixes coverity issue of "unchecked return value".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r-- | drivers/cpufreq/imx6q-cpufreq.c | 44 |
1 files changed, 32 insertions, 12 deletions
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index ef46f5eb51ca..bf1092d02428 100644 --- a/drivers/cpufreq/imx6q-cpufreq.c +++ b/drivers/cpufreq/imx6q-cpufreq.c @@ -63,7 +63,7 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index) unsigned long freq_hz, volt, volt_old; unsigned int old_freq, new_freq; bool pll1_sys_temp_enabled = false; - int ret; + int ret, ret1; new_freq = freq_table[index].frequency; freq_hz = new_freq * 1000; @@ -182,13 +182,13 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index) /* Ensure the arm clock divider is what we expect */ ret = clk_set_rate(arm_clk, new_freq * 1000); if (ret) { - int ret1; - dev_err(cpu_dev, "failed to set clock rate: %d\n", ret); ret1 = regulator_set_voltage_tol(arm_reg, volt_old, 0); - if (ret1) - dev_warn(cpu_dev, - "failed to restore vddarm voltage: %d\n", ret1); + if (ret1) { + dev_err(cpu_dev, + "failed to restore vddarm: %d\n", ret1); + return ret1; + } return ret; } @@ -266,14 +266,28 @@ static struct cpufreq_driver imx6q_cpufreq_driver = { static int imx6_cpufreq_pm_notify(struct notifier_block *nb, unsigned long event, void *dummy) { + int ret; + switch (event) { case PM_SUSPEND_PREPARE: - if (!IS_ERR(dc_reg) && !ignore_dc_reg) - regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MAX, 0); + if (!IS_ERR(dc_reg) && !ignore_dc_reg) { + ret = regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MAX, 0); + if (ret) { + dev_err(cpu_dev, + "failed to scale dc_reg to max: %d\n", ret); + return ret; + } + } break; case PM_POST_SUSPEND: - if (!IS_ERR(dc_reg) && !ignore_dc_reg) - regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MIN, 0); + if (!IS_ERR(dc_reg) && !ignore_dc_reg) { + ret = regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MIN, 0); + if (ret) { + dev_err(cpu_dev, + "failed to scale dc_reg to min: %d\n", ret); + return ret; + } + } break; default: break; @@ -412,8 +426,14 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) */ if (freq_table[num - 1].frequency > FREQ_528_MHZ) ignore_dc_reg = true; - if (!IS_ERR(dc_reg) && !ignore_dc_reg) - regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MIN, 0); + if (!IS_ERR(dc_reg) && !ignore_dc_reg) { + ret = regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MIN, 0); + if (ret) { + dev_err(cpu_dev, + "failed to scale dc_reg to min: %d\n", ret); + return ret; + } + } /* Make imx6_soc_volt array's size same as arm opp number */ imx6_soc_volt = devm_kzalloc(cpu_dev, sizeof(*imx6_soc_volt) * num, GFP_KERNEL); |