MLK-9951 Update CAAM driver era interface

Add more CAAM era values to the CAAM driver's caam_get_era()
function. Read only 32 bits of data since the data required
to identify the IP_ID and MAJ_REV is located in the first 32
bits of the register. And, update the function for use with
ARM/Little Endian devices.

[<vicki.milhoan@freescale.com>: Edited to apply to 3.14]
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
(cherry picked from commit 6050d7faf2d0c063195aa9454c130548a9f8058f)

3 files changed, 37 insertions, 11 deletions

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index ef2286ea9385..1ac03feb1a3a 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -365,9 +365,9 @@ static void kick_trng(struct platform_device *pdev, int ent_delay)
  * Returns the ERA number (1..4) or -ENOTSUPP if the ERA is unknown.
  * @caam_id - the value of the SEC_VID register
  **/
-int caam_get_era(u64 caam_id)
+int caam_get_era(u32 caam_id)
 {
-	struct sec_vid *sec_vid = (struct sec_vid *)&caam_id;
+	struct sec_vid sec_vid;
 	static const struct {
 		u16 ip_id;
 		u8 maj_rev;
@@ -377,16 +377,38 @@ int caam_get_era(u64 caam_id)
 		{0x0A10, 2, 2},
 		{0x0A12, 1, 3},
 		{0x0A14, 1, 3},
+		{0x0A10, 3, 4},
+		{0x0A11, 1, 4},
 		{0x0A14, 2, 4},
 		{0x0A16, 1, 4},
-		{0x0A11, 1, 4}
+		{0x0A18, 1, 4},
+		{0x0A11, 2, 5},
+		{0x0A12, 2, 5},
+		{0x0A13, 1, 5},
+		{0x0A1C, 1, 5},
+		{0x0A12, 4, 6},
+		{0x0A13, 2, 6},
+		{0x0A16, 2, 6},
+		{0x0A17, 1, 6},
+		{0x0A18, 2, 6},
+		{0x0A1A, 1, 6},
+		{0x0A1C, 2, 6},
+		{0x0A14, 3, 7},
+		{0x0A10, 4, 8},
+		{0x0A11, 3, 8},
+		{0x0A11, 4, 8},
+		{0x0A12, 5, 8},
+		{0x0A16, 3, 8},
 	};
 	int i;
 
+       sec_vid.ip_id = caam_id >> SEC_VID_IPID_SHIFT;
+       sec_vid.maj_rev = (caam_id & SEC_VID_MAJ_MASK) >> SEC_VID_MAJ_SHIFT;
+
 	for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
-		if (caam_eras[i].ip_id == sec_vid->ip_id &&
-			caam_eras[i].maj_rev == sec_vid->maj_rev)
-				return caam_eras[i].era;
+		if (caam_eras[i].ip_id == sec_vid.ip_id &&
+			caam_eras[i].maj_rev == sec_vid.maj_rev)
+			return caam_eras[i].era;
 
 	return -ENOTSUPP;
 }
@@ -396,7 +418,7 @@ EXPORT_SYMBOL(caam_get_era);
 static int caam_probe(struct platform_device *pdev)
 {
 	int ret, ring, rspec, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
-	u64 caam_id;
+	u32 caam_id;
 	struct device *dev;
 	struct device_node *nprop, *np;
 	struct caam_ctrl __iomem *ctrl;
@@ -669,10 +691,10 @@ static int caam_probe(struct platform_device *pdev)
 
 	/* NOTE: RTIC detection ought to go here, around Si time */
 
-	caam_id = rd_reg64(&topregs->ctrl.perfmon.caam_id);
+	caam_id = rd_reg32(&topregs->ctrl.perfmon.caam_id);
 
 	/* Report "alive" for developer to see */
-	dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
+	dev_info(dev, "device ID = 0x%08x (Era %d)\n", caam_id,
 		 caam_get_era(caam_id));
 	dev_info(dev, "job rings = %d, qi = %d\n",
 		 ctrlpriv->total_jobrs, ctrlpriv->qi_present);
diff --git a/drivers/crypto/caam/ctrl.h b/drivers/crypto/caam/ctrl.h
index 980d44eaaf40..6527c2a671b9 100644
--- a/drivers/crypto/caam/ctrl.h
+++ b/drivers/crypto/caam/ctrl.h
@@ -1,13 +1,13 @@
 /*
  * CAAM control-plane driver backend public-level include definitions
  *
- * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
  */
 
 #ifndef CTRL_H
 #define CTRL_H
 
 /* Prototypes for backend-level services exposed to APIs */
-int caam_get_era(u64 caam_id);
+int caam_get_era(u32 caam_id);
 
 #endif /* CTRL_H */
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
index 62bac6df4c05..490ec9b5b25b 100644
--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@ -221,6 +221,10 @@ struct sec_vid {
 	u8 min_rev;
 };
 
+#define SEC_VID_IPID_SHIFT      16
+#define SEC_VID_MAJ_SHIFT       8
+#define SEC_VID_MAJ_MASK        0xFF00
+
 struct caam_perfmon {
 	/* Performance Monitor Registers			f00-f9f */
 	u64 req_dequeued;	/* PC_REQ_DEQ - Dequeued Requests	     */