diff options
| author | Huang Shijie <b32955@freescale.com> | 2012-01-31 10:53:46 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-07-20 13:20:26 +0800 |
| commit | 3b4df4dff50ac955516c5fe7aadb5b15409b1360 (patch) | |
| tree | cfb0828a14e8c98d6b1dc8d3e021b51cd10973cd /drivers/dma | |
| parent | 33f6451dd168733b3e67f50f93fad066f86f1e55 (diff) | |
ENGR00173369-1 Revert "ENGR00169906-4 MXS-DMA : change the last parameter...
This reverts commit a1a43335ccbf5578eb48edbf16c11e53d76c0123.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/mxs-dma.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index dda7525674b9..dfb0a6d0da8f 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -381,7 +381,7 @@ static void mxs_dma_free_chan_resources(struct dma_chan *chan) static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_data_direction direction, - unsigned long flags) + unsigned long append) { struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan); struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; @@ -390,7 +390,6 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( int i, j; u32 *pio; static int idx; - bool append = flags & MXS_DMA_F_APPEND; if (mxs_chan->status == DMA_IN_PROGRESS && !append) return NULL; @@ -416,6 +415,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( ccw->bits |= CCW_CHAIN; ccw->bits &= ~CCW_IRQ; ccw->bits &= ~CCW_DEC_SEM; + ccw->bits &= ~CCW_WAIT4END; } else { idx = 0; } @@ -430,8 +430,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( ccw->bits = 0; ccw->bits |= CCW_IRQ; ccw->bits |= CCW_DEC_SEM; - if (flags & MXS_DMA_F_WAIT4END) - ccw->bits |= CCW_WAIT4END; + ccw->bits |= CCW_WAIT4END; ccw->bits |= CCW_HALT_ON_TERM; ccw->bits |= CCW_TERM_FLUSH; ccw->bits |= BF_CCW(sg_len, PIO_NUM); @@ -462,8 +461,7 @@ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( ccw->bits &= ~CCW_CHAIN; ccw->bits |= CCW_IRQ; ccw->bits |= CCW_DEC_SEM; - if (flags & MXS_DMA_F_WAIT4END) - ccw->bits |= CCW_WAIT4END; + ccw->bits |= CCW_WAIT4END; } } } |