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authorZeng Zhaoming <b32542@freescale.com>2011-07-18 11:55:41 +0800
committerJason Liu <r64343@freescale.com>2012-07-20 13:14:46 +0800
commitefda1d30a46e77e56ad46bac1bc9303e39465752 (patch)
tree8803e0c0e8f0220749f21abe6e4c5e2e4ce98d59 /drivers/dma
parent48f93c74bdf669dada737c62de44cc120c90f17f (diff)
ENGR00152287-3 SDMA: Fix sdma cache bufferable issue
MX6Q desclare dma memory bufferable, which cause sdma load context failed in 60% possibility. To fix it, we need to add dsb to flush write buffer before start dma transfer. Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/imx-sdma.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 0ed6c6e99ff4..3642ca4d07bd 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -373,6 +373,7 @@ static int sdma_run_channel(struct sdma_channel *sdmac)
init_completion(&sdmac->done);
+ wmb();
__raw_writel(1 << channel, sdma->regs + SDMA_H_START);
ret = wait_for_completion_timeout(&sdmac->done, HZ);
@@ -768,6 +769,7 @@ out:
static void sdma_enable_channel(struct sdma_engine *sdma, int channel)
{
+ wmb();
__raw_writel(1 << channel, sdma->regs + SDMA_H_START);
}