Merge remote branch 'fsl-linux-sdk/imx_3.0.15' into imx_3.0.15_android

Conflicts:
	arch/arm/configs/imx6_defconfig
	arch/arm/kernel/smp.c
	arch/arm/mach-mx6/board-mx6q_arm2.c
	arch/arm/mach-mx6/board-mx6q_sabreauto.c
	arch/arm/mach-mx6/board-mx6q_sabrelite.c
	arch/arm/mach-mx6/board-mx6q_sabresd.c
	arch/arm/mach-mx6/bus_freq.c
	arch/arm/mach-mx6/clock.c
	arch/arm/mach-mx6/cpu.c
	arch/arm/mach-mx6/devices-imx6q.h
	arch/arm/mach-mx6/mx6_ddr_freq.S
	arch/arm/mach-mx6/mx6_mmdc.c
	arch/arm/mach-mx6/mx6_suspend.S
	arch/arm/mach-mx6/mx6_wfi.S
	arch/arm/mach-mx6/plat_hotplug.c
	arch/arm/mach-mx6/pm.c
	arch/arm/mach-mx6/system.c
	arch/arm/plat-mxc/cpufreq.c
	arch/arm/plat-mxc/system.c
	drivers/media/video/mxc/capture/Kconfig
	drivers/media/video/mxc/capture/mxc_v4l2_capture.c
	drivers/media/video/mxc/capture/ov5640_mipi.c
	drivers/media/video/mxc/output/mxc_vout.c
	drivers/mmc/host/sdhci.c
	drivers/mtd/nand/gpmi-nand/gpmi-lib.c
	drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c
	drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c
	drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h
	drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h
	drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h
	drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
	drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
	drivers/mxc/ipu3/vdoa.c
	drivers/power/max8903_charger.c
	drivers/video/mxc/mxc_ipuv3_fb.c
	sound/soc/codecs/mxc_spdif.c
	sound/soc/imx/Makefile
	sound/soc/imx/imx-wm8962.c

3 files changed, 49 insertions, 25 deletions

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 306dcdd0dc38..a4ed05342168 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -340,9 +340,9 @@ static int sdma_config_ownership(struct sdma_channel *sdmac,
 	if (event_override && mcu_override && dsp_override)
 		return -EINVAL;
 
-	evt = __raw_readl(sdma->regs + SDMA_H_EVTOVR);
-	mcu = __raw_readl(sdma->regs + SDMA_H_HOSTOVR);
-	dsp = __raw_readl(sdma->regs + SDMA_H_DSPOVR);
+	evt = readl_relaxed(sdma->regs + SDMA_H_EVTOVR);
+	mcu = readl_relaxed(sdma->regs + SDMA_H_HOSTOVR);
+	dsp = readl_relaxed(sdma->regs + SDMA_H_DSPOVR);
 
 	if (dsp_override)
 		dsp &= ~(1 << channel);
@@ -359,9 +359,9 @@ static int sdma_config_ownership(struct sdma_channel *sdmac,
 	else
 		mcu |= (1 << channel);
 
-	__raw_writel(evt, sdma->regs + SDMA_H_EVTOVR);
-	__raw_writel(mcu, sdma->regs + SDMA_H_HOSTOVR);
-	__raw_writel(dsp, sdma->regs + SDMA_H_DSPOVR);
+	writel_relaxed(evt, sdma->regs + SDMA_H_EVTOVR);
+	writel_relaxed(mcu, sdma->regs + SDMA_H_HOSTOVR);
+	writel_relaxed(dsp, sdma->regs + SDMA_H_DSPOVR);
 
 	return 0;
 }
@@ -378,7 +378,7 @@ static int sdma_run_channel(struct sdma_channel *sdmac)
 	init_completion(&sdmac->done);
 
 	wmb();
-	__raw_writel(1 << channel, sdma->regs + SDMA_H_START);
+	writel_relaxed(1 << channel, sdma->regs + SDMA_H_START);
 
 	ret = wait_for_completion_timeout(&sdmac->done, HZ);
 
@@ -421,9 +421,9 @@ static void sdma_event_enable(struct sdma_channel *sdmac, unsigned int event)
 	u32 val;
 	u32 chnenbl = chnenbl_ofs(sdma, event);
 
-	val = __raw_readl(sdma->regs + chnenbl);
+	val = readl_relaxed(sdma->regs + chnenbl);
 	val |= (1 << channel);
-	__raw_writel(val, sdma->regs + chnenbl);
+	writel_relaxed(val, sdma->regs + chnenbl);
 }
 
 static void sdma_event_disable(struct sdma_channel *sdmac, unsigned int event)
@@ -433,9 +433,9 @@ static void sdma_event_disable(struct sdma_channel *sdmac, unsigned int event)
 	u32 chnenbl = chnenbl_ofs(sdma, event);
 	u32 val;
 
-	val = __raw_readl(sdma->regs + chnenbl);
+	val = readl_relaxed(sdma->regs + chnenbl);
 	val &= ~(1 << channel);
-	__raw_writel(val, sdma->regs + chnenbl);
+	writel_relaxed(val, sdma->regs + chnenbl);
 }
 
 static void sdma_handle_channel_loop(struct sdma_channel *sdmac)
@@ -512,8 +512,8 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id)
 	struct sdma_engine *sdma = dev_id;
 	u32 stat;
 
-	stat = __raw_readl(sdma->regs + SDMA_H_INTR);
-	__raw_writel(stat, sdma->regs + SDMA_H_INTR);
+	stat = readl_relaxed(sdma->regs + SDMA_H_INTR);
+	writel_relaxed(stat, sdma->regs + SDMA_H_INTR);
 
 	while (stat) {
 		int channel = fls(stat) - 1;
@@ -673,7 +673,7 @@ static void sdma_disable_channel(struct sdma_channel *sdmac)
 	struct sdma_engine *sdma = sdmac->sdma;
 	int channel = sdmac->channel;
 
-	__raw_writel(1 << channel, sdma->regs + SDMA_H_STATSTOP);
+	writel_relaxed(1 << channel, sdma->regs + SDMA_H_STATSTOP);
 	sdmac->status = DMA_ERROR;
 }
 
@@ -778,7 +778,7 @@ static int sdma_set_channel_priority(struct sdma_channel *sdmac,
 		return -EINVAL;
 	}
 
-	__raw_writel(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel);
+	writel_relaxed(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel);
 
 	return 0;
 }
@@ -817,7 +817,7 @@ out:
 static void sdma_enable_channel(struct sdma_engine *sdma, int channel)
 {
 	wmb();
-	__raw_writel(1 << channel, sdma->regs + SDMA_H_START);
+	writel(1 << channel, sdma->regs + SDMA_H_START);
 }
 
 static dma_cookie_t sdma_assign_cookie(struct sdma_channel *sdmac)
@@ -1246,7 +1246,7 @@ static int __init sdma_init(struct sdma_engine *sdma)
 	clk_enable(sdma->clk);
 
 	/* Be sure SDMA has not started yet */
-	__raw_writel(0, sdma->regs + SDMA_H_C0PTR);
+	writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
 
 	sdma->channel_control = dma_alloc_coherent(NULL,
 			MAX_DMA_CHANNELS * sizeof (struct sdma_channel_control) +
@@ -1269,11 +1269,11 @@ static int __init sdma_init(struct sdma_engine *sdma)
 
 	/* disable all channels */
 	for (i = 0; i < sdma->num_events; i++)
-		__raw_writel(0, sdma->regs + chnenbl_ofs(sdma, i));
+		writel_relaxed(0, sdma->regs + chnenbl_ofs(sdma, i));
 
 	/* All channels have priority 0 */
 	for (i = 0; i < MAX_DMA_CHANNELS; i++)
-		__raw_writel(0, sdma->regs + SDMA_CHNPRI_0 + i * 4);
+		writel_relaxed(0, sdma->regs + SDMA_CHNPRI_0 + i * 4);
 
 	ret = sdma_request_channel(&sdma->channel[0]);
 	if (ret)
@@ -1282,16 +1282,16 @@ static int __init sdma_init(struct sdma_engine *sdma)
 	sdma_config_ownership(&sdma->channel[0], false, true, false);
 
 	/* Set Command Channel (Channel Zero) */
-	__raw_writel(0x4050, sdma->regs + SDMA_CHN0ADDR);
+	writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
 
 	/* Set bits of CONFIG register but with static context switching */
 	/* FIXME: Check whether to set ACR bit depending on clock ratios */
-	__raw_writel(0, sdma->regs + SDMA_H_CONFIG);
+	writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
 
-	__raw_writel(ccb_phys, sdma->regs + SDMA_H_C0PTR);
+	writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
 
 	/* Set bits of CONFIG register with given context switching mode */
-	__raw_writel(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
+	writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
 
 	/* Initializes channel's priorities */
 	sdma_set_channel_priority(&sdma->channel[0], 7);
diff --git a/drivers/dma/pxp/pxp_dma.c b/drivers/dma/pxp/pxp_dma.c
index eb5b4fb60306..ddd1c0cd192d 100644
--- a/drivers/dma/pxp/pxp_dma.c
+++ b/drivers/dma/pxp/pxp_dma.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -180,6 +180,7 @@ static bool is_yuv(u32 pix_fmt)
 	    (pix_fmt == PXP_PIX_FMT_YUV444) |
 	    (pix_fmt == PXP_PIX_FMT_NV12) |
 	    (pix_fmt == PXP_PIX_FMT_GREY) |
+	    (pix_fmt == PXP_PIX_FMT_GY04) |
 	    (pix_fmt == PXP_PIX_FMT_YVU410P) |
 	    (pix_fmt == PXP_PIX_FMT_YUV410P) |
 	    (pix_fmt == PXP_PIX_FMT_YVU420P) |
@@ -215,6 +216,9 @@ static void pxp_set_ctrl(struct pxps *pxp)
 	case PXP_PIX_FMT_GREY:
 		fmt_ctrl = BV_PXP_CTRL_S0_FORMAT__YUV420;
 		break;
+	case PXP_PIX_FMT_GY04:
+		fmt_ctrl = BV_PXP_CTRL_S0_FORMAT__YUV420;
+		break;
 	case PXP_PIX_FMT_YUV422P:
 		fmt_ctrl = BV_PXP_CTRL_S0_FORMAT__YUV422;
 		break;
@@ -243,6 +247,9 @@ static void pxp_set_ctrl(struct pxps *pxp)
 	case PXP_PIX_FMT_GREY:
 		fmt_ctrl = BV_PXP_CTRL_OUTBUF_FORMAT__MONOC8;
 		break;
+	case PXP_PIX_FMT_GY04:
+		fmt_ctrl = BV_PXP_CTRL_OUTBUF_FORMAT__MONOC4;
+		break;
 	default:
 		fmt_ctrl = 0;
 	}
@@ -620,6 +627,14 @@ static void pxp_set_s0buf(struct pxps *pxp)
 		__raw_writel(U, pxp->base + HW_PXP_S0UBUF);
 		__raw_writel(V, pxp->base + HW_PXP_S0VBUF);
 	}
+
+	/* TODO: only support RGB565, Y8 , Y4 */
+	if (s0_params->pixel_fmt == PXP_PIX_FMT_GREY)
+		__raw_writel(s0_params->width, pxp->base + HW_PXP_PS_PITCH);
+	else if (s0_params->pixel_fmt == PXP_PIX_FMT_GY04)
+		 __raw_writel(s0_params->width >> 1, pxp->base + HW_PXP_PS_PITCH);
+	else
+		__raw_writel(s0_params->width * 2, pxp->base + HW_PXP_PS_PITCH);
 }
 
 /**
diff --git a/drivers/dma/pxp/pxp_dma_v2.c b/drivers/dma/pxp/pxp_dma_v2.c
index 3fadd9a5f762..ceb72edbd39e 100644
--- a/drivers/dma/pxp/pxp_dma_v2.c
+++ b/drivers/dma/pxp/pxp_dma_v2.c
@@ -220,6 +220,7 @@ static bool is_yuv(u32 pix_fmt)
 	    (pix_fmt == PXP_PIX_FMT_YUV444) |
 	    (pix_fmt == PXP_PIX_FMT_NV12) |
 	    (pix_fmt == PXP_PIX_FMT_GREY) |
+	    (pix_fmt == PXP_PIX_FMT_GY04) |
 	    (pix_fmt == PXP_PIX_FMT_YVU410P) |
 	    (pix_fmt == PXP_PIX_FMT_YUV410P) |
 	    (pix_fmt == PXP_PIX_FMT_YVU420P) |
@@ -257,6 +258,9 @@ static void pxp_set_ctrl(struct pxps *pxp)
 	case PXP_PIX_FMT_GREY:
 		fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__Y8;
 		break;
+	case PXP_PIX_FMT_GY04:
+		fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__Y4;
+		break;
 	case PXP_PIX_FMT_YUV422P:
 		fmt_ctrl = BV_PXP_PS_CTRL_FORMAT__YUV422;
 		break;
@@ -287,6 +291,9 @@ static void pxp_set_ctrl(struct pxps *pxp)
 	case PXP_PIX_FMT_GREY:
 		fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__Y8;
 		break;
+	case PXP_PIX_FMT_GY04:
+		fmt_ctrl = BV_PXP_OUT_CTRL_FORMAT__Y4;
+		break;
 	default:
 		fmt_ctrl = 0;
 	}
@@ -697,9 +704,11 @@ static void pxp_set_s0buf(struct pxps *pxp)
 		__raw_writel(V, pxp->base + HW_PXP_PS_VBUF);
 	}
 
-	/* TODO: only support RGB565, Y8 */
+	/* TODO: only support RGB565, Y8, Y4 */
 	if (s0_params->pixel_fmt == PXP_PIX_FMT_GREY)
 		__raw_writel(s0_params->width, pxp->base + HW_PXP_PS_PITCH);
+	else if (s0_params->pixel_fmt == PXP_PIX_FMT_GY04)
+		__raw_writel(s0_params->width >> 1, pxp->base + HW_PXP_PS_PITCH);
 	else
 		__raw_writel(s0_params->width * 2, pxp->base + HW_PXP_PS_PITCH);
 }